Proceedings International Symposium on High Performance Computer Architecture
-
Publication Venue For
- Strategies for anticipating risk in heterogeneous system design. 154-164. 2014
- Coset coding to extend the lifetime of memory. 222-233. 2013
- Disintegrated control for energy-efficient and heterogeneous memory systems. 424-435. 2013
- Navigating heterogeneous processors with market mechanisms. 95-106. 2013
- Roughness of microarchitectural design topologies and its implications for optimization. 240-251. 2008
- Error detection via online checking of cache coherence with token coherence signatures. 145-156. 2007
- Illustrative design space studies with microarchitectural regression models. 340-351. 2007
- CMP design space exploration subject to physical constraints. 2006:15-26. 2006
- HeteroGen: Automatic Synthesis of Heterogeneous Cache Coherence Protocols 2022
- The Specialized High-Performance Network on Anton 3 2022
- GraphR: Accelerating Graph Processing Using ReRAM 2018
- RC-NVM: Enabling Symmetric Row and Column Memory Accesses for In-memory Databases 2018
- PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning 2017
- PVCoherence: Designing flat coherence protocols for scalable verification 2014
- Scalably verifiable dynamic power management 2014
- Flexible register management using reference counting 2012
- A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement 2010
- BOLT: Energy-efficient out-of-order latency-tolerant execution 2010
- Unified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all 2010
- A novel architecture of the 3D stacked MRAM L2 Cache for CMPs 2009
- Icfp: tolerating all-level cache misses in in-order processors 2009
- Deterministic clock gating for microprocessor power reduction 2003
- Exploring the VLSI scalability of stream processors 2003
- Bandwidth adaptive snooping 2002