Scalable compact modeling for on-chip passive elements with correlated parameter extraction and adaptive boundary compression

Published

Journal Article

Scalable compact models for passive elements are important in the Analog/RF circuit design and optimization. Traditional scalable modeling methods are mainly physical and manual based methods, which usually require deep physical insight and extensive human intervention. In this paper, an automatic scalable compact modeling method for generic passive elements is established. The proposed method is a unified parameter extraction and scalable modeling scheme with novel inner-loop correlated parameter extraction and outer-loop adaptive boundary compression techniques. Experimental results show that both accuracy and scalability have been achieved by the proposed method for industrial inductors and transformers with an acceptable computational cost. © 1982-2012 IEEE.

Full Text

Cited Authors

  • Yao, J; Ye, Z; Wang, Y

Published Date

  • January 1, 2014

Published In

Volume / Issue

  • 33 / 9

Start / End Page

  • 1424 - 1428

International Standard Serial Number (ISSN)

  • 0278-0070

Digital Object Identifier (DOI)

  • 10.1109/TCAD.2014.2323197

Citation Source

  • Scopus