Modeling Physical Limitations on Junction Scaling for CMOS

Journal Article (Journal Article)

Accurate calculations of diffusion and ion-implantition processes in silicon require the utilization of complex steady-state physical models that include the effects of both vacancies and self-intersti tials. A new one-dimensional computer program, PROSIM II, has been developed for use in experimental junction formation studies that impact on advanced MOS technologies. PROSIM II has been used to study the scaling limits of counter-doped junctions for CMOS using both conventional furnace annealing and rapid thermal annealing processes. It is found that double implants of boron and arsenic can be used to produce a minimum 3000-A-deep junction and still satisfy sheet resistance requirements for a I-μm process. © 1984 IEEE

Full Text

Duke Authors

Cited Authors

  • Fair, RB; Wortman, JJ; Masnari, NA; Mike Tischler, JL

Published Date

  • January 1, 1984

Published In

Volume / Issue

  • 31 / 9

Start / End Page

  • 1180 - 1185

Electronic International Standard Serial Number (EISSN)

  • 1557-9646

International Standard Serial Number (ISSN)

  • 0018-9383

Digital Object Identifier (DOI)

  • 10.1109/T-ED.1984.21685

Citation Source

  • Scopus