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FlexLevel: A novel NAND flash storage system design for LDPC latency reduction

Publication ,  Conference
Guo, J; Wen, W; Hu, J; Wang, D; Li, H; Chen, Y
Published in: Proceedings - Design Automation Conference
July 24, 2015

LDPC code is introduced in NAND flash memory to handle high BER (bit error rate) incurred by technology scaling. Despite strong error correction capability, LDPC decoding induces long NAND flash read latency. In this work, we propose FlexLevel - a robust NAND flash storage system design to improve data reliability and read efficiency affected by the LDPC operations. FlexLevel first reduces BER by enlarging noise margins via Vth (threshold voltage) level reduction. It reduces the sensing levels of LDPC but also causes loss of storage capacity. To compensate this capacity loss with minimum impact on read performance, FlexLevel identifies the data with high LDPC overhead and only applies the Vth level reduction technique to those data. Experimental results show that compared with state-of-the-art, FlexLevel can achieve up to 33% read speedup with very moderate capacity loss.

Duke Scholars

Published In

Proceedings - Design Automation Conference

DOI

ISSN

0738-100X

ISBN

9781450335201

Publication Date

July 24, 2015

Volume

2015-July
 

Citation

APA
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Guo, J., Wen, W., Hu, J., Wang, D., Li, H., & Chen, Y. (2015). FlexLevel: A novel NAND flash storage system design for LDPC latency reduction. In Proceedings - Design Automation Conference (Vol. 2015-July). https://doi.org/10.1145/2744769.2744843
Guo, J., W. Wen, J. Hu, D. Wang, H. Li, and Y. Chen. “FlexLevel: A novel NAND flash storage system design for LDPC latency reduction.” In Proceedings - Design Automation Conference, Vol. 2015-July, 2015. https://doi.org/10.1145/2744769.2744843.
Guo J, Wen W, Hu J, Wang D, Li H, Chen Y. FlexLevel: A novel NAND flash storage system design for LDPC latency reduction. In: Proceedings - Design Automation Conference. 2015.
Guo, J., et al. “FlexLevel: A novel NAND flash storage system design for LDPC latency reduction.” Proceedings - Design Automation Conference, vol. 2015-July, 2015. Scopus, doi:10.1145/2744769.2744843.
Guo J, Wen W, Hu J, Wang D, Li H, Chen Y. FlexLevel: A novel NAND flash storage system design for LDPC latency reduction. Proceedings - Design Automation Conference. 2015.

Published In

Proceedings - Design Automation Conference

DOI

ISSN

0738-100X

ISBN

9781450335201

Publication Date

July 24, 2015

Volume

2015-July