A hardware security scheme for RRAM-based FPGA

Conference Paper

To enhance the system integrity of FPGA-based embedded systems on hardware design, we propose a hardware security scheme for nonvolatile resistive random access memory (RRAM) based FPGA, in which internal block RAM (BRAMs) are used for configuration and temporary data storage. The proposed scheme loads obfuscated configurations into nonvolatile BRAMs to protect design data from physical attacks and utilizes Chip DNA to enable logic function. © 2013 IEEE.

Full Text

Duke Authors

Cited Authors

  • Chen, YC; Zhang, W; Li, HH

Published Date

  • January 1, 2013

Published In

  • 2013 23rd International Conference on Field Programmable Logic and Applications, Fpl 2013 Proceedings

Digital Object Identifier (DOI)

  • 10.1109/FPL.2013.6645556

Citation Source

  • Scopus