The microarchitecture of a real-Time robot motion planning accelerator

Published

Conference Paper

© 2016 IEEE. We have developed a hardware accelerator for motion planning, a critical operation in robotics. In this paper, we present the microarchitecture of our accelerator and describe a prototype implementation on an FPGA. We experimentally show that the accelerator improves performance by three orders of magnitude and improves power consumption by more than one order of magnitude. These gains are achieved through careful hardware/software co-design. We modify conventional motion planning algorithms to aggressively precompute collision data, as well as implement a microarchitecture that leverages the parallelism present in the problem.

Full Text

Duke Authors

Cited Authors

  • Murray, S; Floyd-Jones, W; Qi, Y; Konidaris, G; Sorin, DJ

Published Date

  • December 14, 2016

Published In

Volume / Issue

  • 2016-December /

International Standard Serial Number (ISSN)

  • 1072-4451

International Standard Book Number 13 (ISBN-13)

  • 9781509035083

Digital Object Identifier (DOI)

  • 10.1109/MICRO.2016.7783748

Citation Source

  • Scopus