Identifying wafer-level systematic failure patterns via unsupervised learning

Published

Journal Article

© 2017 IEEE. In this paper, we propose a novel methodology for detecting systematic failure patterns at the wafer level for yield learning. Our proposed methodology takes the binary testing results (i.e., pass or fail) of all dies over multiple wafers, cluster these wafers according to their spatial signatures of failures, and eventually identify the underlying systematic failure patterns. Several data processing techniques, including singular value decomposition, hierarchical clustering, etc., are adopted to make the proposed methodology robust to random failures. In addition, a Pseudo-Boolean satisfiability solver is used to extract a minimal set of systematic failure patterns that explain all wafer-level spatial signatures. These patterns help process engineers identify the root causes of failures and accelerate yield learning. The efficacy of our proposed approach is demonstrated by one synthetic data set and one industrial data set.

Full Text

Duke Authors

Cited Authors

  • Alawieh, MB; Wang, F; Li, X

Published Date

  • April 1, 2018

Published In

Volume / Issue

  • 37 / 4

Start / End Page

  • 832 - 844

International Standard Serial Number (ISSN)

  • 0278-0070

Digital Object Identifier (DOI)

  • 10.1109/TCAD.2017.2729469

Citation Source

  • Scopus