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Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM

Publication ,  Conference
Chen, Y; Li, H; Wang, X; Zhu, W; Xu, W; Zhang, T
Published in: Proceedings of the International Symposium on Low Power Electronics and Design
October 21, 2010

A nondestructive self-reference read scheme (NSRS) was recently proposed to overcome the bit-to-bit variation in Spin-Transfer Torque Random Access Memory (STT-RAM). In this work, we introduced three magnetic-and circuit-level techniques, including 1) R-I curve skewing, 2) yield-driven sensing current selection, and 3) ratio matching to improve the sense margin and robustness of NSRS. The measurements of our 16Kb STT-RAM test chip show that compared to the original NSRS design, our proposed technologies successfully increased the sense margin by 2.5X with minimized impacts on the memory reliability and hardware cost. Copyright 2010 ACM.

Duke Scholars

Published In

Proceedings of the International Symposium on Low Power Electronics and Design

DOI

ISSN

1533-4678

ISBN

9781450301466

Publication Date

October 21, 2010

Start / End Page

1 / 6
 

Citation

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MLA
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Chen, Y., Li, H., Wang, X., Zhu, W., Xu, W., & Zhang, T. (2010). Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM. In Proceedings of the International Symposium on Low Power Electronics and Design (pp. 1–6). https://doi.org/10.1145/1840845.1840847
Chen, Y., H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang. “Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM.” In Proceedings of the International Symposium on Low Power Electronics and Design, 1–6, 2010. https://doi.org/10.1145/1840845.1840847.
Chen Y, Li H, Wang X, Zhu W, Xu W, Zhang T. Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM. In: Proceedings of the International Symposium on Low Power Electronics and Design. 2010. p. 1–6.
Chen, Y., et al. “Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM.” Proceedings of the International Symposium on Low Power Electronics and Design, 2010, pp. 1–6. Scopus, doi:10.1145/1840845.1840847.
Chen Y, Li H, Wang X, Zhu W, Xu W, Zhang T. Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM. Proceedings of the International Symposium on Low Power Electronics and Design. 2010. p. 1–6.

Published In

Proceedings of the International Symposium on Low Power Electronics and Design

DOI

ISSN

1533-4678

ISBN

9781450301466

Publication Date

October 21, 2010

Start / End Page

1 / 6