Post-silicon performance modeling and tuning of analog/mixed-signal circuits via bayesian model fusion

Published

Conference Paper

Post-silicon tuning has recently emerged as an important technique to combat large-scale uncertainties (e.g., process variation, device modeling errors, etc) for today's nanoscale circuits. This talk presents a novel Bayesian Model Fusion (BMF) technique for efficient post-silicon performance modeling and tuning of analog and mixed-signal (AMS) circuits. The key idea is to borrow the simulation or measurement data from an early stage (e.g., pre-silicon) to accurately build AMS performance models at a late stage (e.g., post-silicon). The post-silicon models are then used to facilitate efficient tuning of AMS circuits. A circuit example designed in a commercial 32 nm CMOS process is used to demonstrate the efficacy of the proposed post-silicon performance modeling and tuning methodology based on BMF. © 2012 ACM.

Full Text

Duke Authors

Cited Authors

  • Li, X

Published Date

  • January 1, 2012

Published In

Start / End Page

  • 551 - 552

International Standard Serial Number (ISSN)

  • 1092-3152

Digital Object Identifier (DOI)

  • 10.1145/2429384.2429503

Citation Source

  • Scopus