Workload-Aware Static Aging Monitoring and Mitigation of Timing-Critical Flip-Flops

Published

Journal Article

© 2017 IEEE. In advanced technology nodes, bias temperature instability (BTI) has emerged as a prominent reliability concern. The worst-case effects of BTI occur during specific workload phases in which flip-flops (FFs) on a critical path do not switch their logic values for a long duration. These inactive FFs in the circuit experience accelerated workload-dependent static-BTI (S-BTI) stress. The aging effect of S-BTI for a few hours has been shown to be equivalent to one year of aging due to dynamic BTI, which can eventually cause circuit failure. The techniques available to mitigate S-BTI stress during standby mode of circuits are pessimistic, thereby limiting the performance of the circuit. To address this problem, we propose a runtime monitoring method to raise a flag when a timing-critical FF experiences severe S-BTI stress. To reduce the monitoring costs, we select a small representative set of FFs offline based on workload-aware correlation analysis and these selected FFs are monitored online for static aging phases. Our experiments conducted on two processors show that less than 0.5% of the total number of FFs is required to be selected as representative FFs for S-BTI stress monitoring. We also propose a low-overhead mitigation scheme to relax critical FFs by executing a software subroutine that is designed to exercise critical FFs.

Full Text

Cited Authors

  • Vijayan, A; Kiamehr, S; Oboril, F; Chakrabarty, K; Tahoori, MB

Published Date

  • October 1, 2018

Published In

Volume / Issue

  • 37 / 10

Start / End Page

  • 2098 - 2110

International Standard Serial Number (ISSN)

  • 0278-0070

Digital Object Identifier (DOI)

  • 10.1109/TCAD.2017.2778254

Citation Source

  • Scopus