A high-linearity WCDMA/GSM reconfigurable transceiver in 0.13-μm CMOS

Journal Article (Journal Article)

This paper presents a dual-mode multiband transceiver with DigRF interface implemented in a 0.13-μm CMOS technology. Based on direct conversion architecture, blocks in the transceiver can be configured to simultaneously support wavelength code-division multiple access (WCDMA) band I and four Global System for Mobile Communications (GSM) bands (PCS/DCS/GSM900/GSM850). In the receiver path, the narrowband radio-frequency front-end is comprised of multiple-gated low-noise amplifiers with capacitive desensitization and current-mode passive mixers with the proposed second-order input intercept point (IIP2) calibration to comply for surface-acoustic-wave-less application. In the transmitter path, a high-linearity mixer and parallel Class-AB PA driver are adopted. Low-noise wideband frequency synthesizers with adaptive frequency calibration are proposed to cover all modes and bands. This reconfigurable transceiver achieves -5.6/-2/-6 dBm in-band third-order intercept point for WCDMA/GSM HB/GSM LB respectively, and > 65 dBm IIP2. At the maximum output power, the transmitter achieves 2.3% rms error vector magnitude for WCDMA I and 1.67° phase error for a GSM system. © 1963-2012 IEEE.

Full Text

Duke Authors

Cited Authors

  • Huang, Y; Li, W; Hu, S; Xie, R; Li, X; Fu, J; Sun, Y; Pan, Y; Chen, H; Jiang, C; Liu, J; Chen, Q; Qiu, D; Qin, Y; Hong, Z; Zeng, X

Published Date

  • January 1, 2013

Published In

Volume / Issue

  • 61 / 1

Start / End Page

  • 204 - 217

International Standard Serial Number (ISSN)

  • 0018-9480

Digital Object Identifier (DOI)

  • 10.1109/TMTT.2012.2222913

Citation Source

  • Scopus