High-speed clock tree simulation with fast wavelet collocation method

Journal Article (Journal Article)

In this paper, we propose a fast wavelet collocation algorithm for high-speed clock tree simulation. Taking advantage of the specific structure of clock trees and the superior computational property of wavelets, the proposed algorithm presents the following merits; (1) It can perform both transient simulation and steady-state analysis with arbitrary input; (2) It employs nonlinear buffer model and nonuniform interconnect wire model; (3) It has a low computational complexity O(N) and can deal with considerably large circuits; (4) The Fast Wavelet Collocation Method works in time domain so that the simulation error in time domain can be well-controlled. Numerical experimental results demonstrate the promising features of the proposed algorithm in high-speed clock tree simulations.

Duke Authors

Cited Authors

  • Li, X; Zeng, X; Shi, J; Chen, W; Zhou, D; Ling, X

Published Date

  • April 1, 2003

Published In

Volume / Issue

  • 12 / 2

Start / End Page

  • 259 - 265

International Standard Serial Number (ISSN)

  • 1022-4653

Citation Source

  • Scopus