Correlated Bayesian Model Fusion: Efficient High-Dimensional Performance Modeling of Analog/RF Integrated Circuits over Multiple Corners

Journal Article (Journal Article)

Efficient high-dimensional performance modeling of analog/RF circuits over multiple corners is an important-yet-challenging task. In this paper, we propose a novel performance modeling approach for analog/RF circuits, referred to as Correlated Bayesian Model Fusion (C-BMF). The key idea is to encode the correlation information for both model template and coefficient magnitude among different corners by using a unified prior distribution. Next, the prior distribution is combined with a few simulation samples via Bayesian inference to efficiently determine the unknown model coefficients. Two circuit examples designed in a commercial 40nm CMOS process demonstrate that C-BMF achieves about 2× cost reduction over the traditional state-of-the-art modeling technique without surrendering any accuracy.

Full Text

Duke Authors

Cited Authors

  • Gao, Z; Wang, F; Tao, J; Su, Y; Zeng, X; Li, X

Published Date

  • January 1, 2022

Published In

Electronic International Standard Serial Number (EISSN)

  • 1937-4151

International Standard Serial Number (ISSN)

  • 0278-0070

Digital Object Identifier (DOI)

  • 10.1109/TCAD.2022.3174170

Citation Source

  • Scopus