Active memory: A new abstraction for memory-system simulation

Conference Paper

This paper describes the active memory abstraction for memory-system simulation. In this abstraction-designed specifically for on-the-fly simulation, memory references logically invoke a user-specified function depending upon the reference's type and accessed memory block state. Active memory allows simulator writers to specify the appropriate action on each reference, including "no action" for the common case of cache hits. Because the abstraction hides implementation details, implementations can be carefully tuned for particular platforms, permitting much more efficient on-the-fly simulation than the traditional trace-driven abstraction. Our SPARC implementation, Fast-Cache, executes simple data cache simulations two or three times faster than a highly-tuned trace-driven simulator and only 2 to 7 times slower than the original program. Fast-Cache implements active memory by performing a fast table look up of the memory block state, taking as few as 3 cycles on a SuperSPARC for the no-action case. Modeling the effects of Fast-Cache's additional lookup instructions qualitatively shows that Fast-Cache is likely to be the most efficient simulator for miss ratios between 3% and 40%.

Full Text

Duke Authors

Cited Authors

  • Lebeck, AR; Wood, DA

Published Date

  • May 1, 1995

Published In

  • Proceedings of the 1995 Acm Sigmetrics Joint International Conference on Measurement and Modeling of Computer Systems, Sigmetrics 1995/Performance 1995

Start / End Page

  • 220 - 230

International Standard Book Number 10 (ISBN-10)

  • 0897916956

International Standard Book Number 13 (ISBN-13)

  • 9780897916950

Digital Object Identifier (DOI)

  • 10.1145/223587.223611

Citation Source

  • Scopus