Smart CMOS focal plane arrays: A Si CMOS detector array and sigma-delta analog-to-digital converter imaging system
Journal Article (Journal Article)
This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design for a fully parallel, monolithically integrated smart CMOS focal plane array is presented. This focal plane image processing chip, with an 8×8 array of Si CMOS detectors each of which have a dedicated on-chip current input first-order sigma-delta analog-to-digital converter front end, has been fabricated, and test results for uniformity and linearity are presented.
Full Text
Duke Authors
Cited Authors
- Joo, Y; Park, J; Thomas, M; Chung, KS; Brooke, MA; Jokerst, NM; Wills, DS
Published Date
- March 1, 1999
Published In
Volume / Issue
- 5 / 2
Start / End Page
- 296 - 305
International Standard Serial Number (ISSN)
- 1077-260X
Digital Object Identifier (DOI)
- 10.1109/2944.778309
Citation Source
- Scopus