Subquarter-mícrometre elevated source-and-drain MOSFET structure using polysilicon spacers
A novel subquarter-micrometre MOSFET with a selfaligned source and drain, structure is proposed with elevated sources and drains formed by using polysilicon spacers. The spacers can reduce the effective channel length by 50% compared to the mask length, and reduce the junction capacitance by over 30% through a reduction in junction area, as shown by PISCES simulations. A graded oxide spacer is used to decrease the parasitic gate-to-drain capacitance. © 1994, IEE. All rights reserved.
Mirabedini, RR; Goodwin-Johansson, SH; Massoud, HZ; Fair, RB
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