Compact, precise digital to analog converter arrays in a low cost, low precision short channel CMOS process
A useful circuit topology for the realization of compact, precise digital to analog converters is presented. The converter architecture uses digital correction to obtain good precision in an inexpensive, non-precision, short channel, digital CMOS process. We present the results of tests performed on the versions of the digital to analog converter test structures fabricated to date. These results are compared with HSPICE Monte Carlo simulations. Large arrays of D to A converters can be fabricated in several inexpensive low precision CMOS processes with thermal stability and trainable linearity characteristics adequate for a wide variety of applications.