High resolution nonlinearity correcting A/D converter architecture

Journal Article

An architecture is presented for a high resolution analog-to-digital (A/D) converter with tolerance to nonlinearities in the critical timing path as well as offsets and gain errors. An error budget analysis is also included which describes the relationship among the various error source in the converter.

Duke Authors

Cited Authors

  • Sculley, TL; Brooke, MA

Published Date

  • January 1, 1993

Published In

Volume / Issue

  • 2 /

Start / End Page

  • 1212 - 1214

International Standard Serial Number (ISSN)

  • 0271-4310

Citation Source

  • Scopus