A structure for an analog divider that allows the use of short-channel devices for high speed without loss in accuracy due to second-order effects is proposed. It consists of 13 parallel modules that each approximate a division in a small region. The weighted sum of all outputs approximates a division for ratios between 1/4 and 4. The design of the modules and the complete circuit is explained. The circuit has been fabricated in a 2-μm CMOS technology. The accuracy is better than 10% and the maximum operating frequency is about 2 MHz.