Huffman encoding of test sets for sequential circuits
Sequential circuits are hard to test because they contain a large number of internal states that are difficult to control and observe. Scan design is often used to simplify testing; however, scan is not always applicable because of area and performance penalties. Recent advances in sequential circuit testing have led to techniques and tools that provide test sets with high coverage of single stuck-line (SSL) faults for nonscan circuits. However, these test sets contain a large number of patterns and require a tester with considerable pattern depth. We investigate the application of Huffman codes to pattern encoding. This allows the use of low-cost testers that do not require excessive memory. Our method is especially applicable to nonscan and partial-scan embedded core circuits. We demonstrate the feasibility of our approach by applying it to SSL test sets for the ISCAS'89 benchmarks. © 1998 IEEE.
Iyengar, V; Chakrabarty, K; Murray, BT
Volume / Issue
Start / End Page
International Standard Serial Number (ISSN)
Digital Object Identifier (DOI)