3D stacked Si CMOS VLSI smart pixels using through-Si optoelectronic interconnections

Journal Article

Three layers of standard foundry Si complimentary metal oxide semiconductor (CMOS) very large scale integrated (VLSI) integrated circuits, each integrated with long wavelength thin film emitter and detectors, have been stacked to realize a 3D system with optical interconnections between the layers. To demonstrate the vertical optical interconnections in the 3D smart pixel three layer Si CMOS circuit stack, the integrated transmitter and receiver circuit were tested. This system demonstrates the viability of implementing optical interconnections for scalable 3D interconnection systems for ultra-smart pixel applications.

Duke Authors

Cited Authors

  • Bond, SW; Jung, S; Vendier, O; Brooke, MA; Jokerst, NM

Published Date

  • 1998

Published In

  • LEOS Summer Topical Meeting

Start / End Page

  • 27 - 28