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Dual-threshold pass-transistor logic design

Publication ,  Journal Article
Oliver, LD; Chakrabarty, K; Massoud, HZ
Published in: Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
November 6, 2009

This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are implemented with low threshold voltages and signal restoration transistors with high threshold voltages. Simulation is used to characterize the leakage power consumption, switching energy, and propagation delay of the proposed gates. A method to reduce circuit power by selectively replacing CMOS gates with the proposed gates is discussed and applied to the ISCAS'85 benchmark circuits. Relative to circuits composed entirely of conventional CMOS gates, use of the proposed SDPL gates achieves up to 49% reduction in leakage power and up to 63% reduction in total power consumption. © 2009 ACM.

Duke Scholars

Published In

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

DOI

Publication Date

November 6, 2009

Start / End Page

291 / 296
 

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Oliver, L. D., Chakrabarty, K., & Massoud, H. Z. (2009). Dual-threshold pass-transistor logic design. Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 291–296. https://doi.org/10.1145/1531542.1531610
Oliver, L. D., K. Chakrabarty, and H. Z. Massoud. “Dual-threshold pass-transistor logic design.” Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, November 6, 2009, 291–96. https://doi.org/10.1145/1531542.1531610.
Oliver LD, Chakrabarty K, Massoud HZ. Dual-threshold pass-transistor logic design. Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI. 2009 Nov 6;291–6.
Oliver, L. D., et al. “Dual-threshold pass-transistor logic design.” Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, Nov. 2009, pp. 291–96. Scopus, doi:10.1145/1531542.1531610.
Oliver LD, Chakrabarty K, Massoud HZ. Dual-threshold pass-transistor logic design. Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI. 2009 Nov 6;291–296.

Published In

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

DOI

Publication Date

November 6, 2009

Start / End Page

291 / 296