Epitaxial liftoff of GaAs detectors onto silicon integrated circuits
The integration of thin film compound semiconductor devices directly on top of silicon processing circuitry enables the three dimensional vertical electrical interconnection of a layer of detectors, for example, to a layer of electronic processing devices to form an imaging systems. The realization of this hardware addresses the input/output and interconnection bottlenecks in integrated circuits. A three dimensional integrated circuit hardware scheme which utilizes massively parallel processing will be presented. In this schemes, silicon circuits are planarized with insulating polyimide. Metallized vias in the polyimide serve as vertical electrical connection on the thin film detectors which are boned to the polyimide, and thus lie directly above the silicon circuitry. Each detector is individually interconnected to the silicon circuitry below through a metallized via, thus realizing parallel, simultaneous processing of the data from each pixel in the array. The demonstration and the system performance of an array of detectors integrated onto a silicon neural network circuit will be presented. Applications of this type of three dimensionally integrated system to image processing system will be analyzed.
