The use of carbon nanotube (CNT)-based field-effect transistors (FETs) as pass transistors is investigated. Logic gates are designed and constructed with these CNT FETs in the pass-transistor logic (PTL) style. Because two of the three terminals of every CNT FET are used as inputs, the efficiency per transistor in PTL circuits is significantly improved. With the PTL style, a single pair of FETS, one n-type and one p-type, is sufficient to construct high-performance AND or OR gates in which the measured output voltages are consistent with those quantitatively derived using the characteristics of the pair of the constituent n- and p-FETs. A one-bit full subtractor, which requires a total of 28 FETs to construct in the usual CMOS circuit, is realized on individual CNTs for the first time using the PTL style with only three pairs of n- and p-FETs.