Reduced precision checking for a floating point adder

Published

Journal Article

We present an error detection technique for a floating point adder which uses a checker adder of reduced precision to determine if the result is correct within some error bound. Our analysis establishes a relationship between the width of the checker adder's mantissa and the worst-case magnitude of an undetected error in the primary adder result. This relationship allows for a tradeoff between error detection capability and area overhead that is not offered by any previously developed floating point adder checking schemes. Experimental results of fault injection experiments are presented which support our analysis. © 2009 IEEE.

Full Text

Duke Authors

Cited Authors

  • Eibl, PJ; Cook, AD; Sorin, DJ

Published Date

  • December 1, 2009

Published In

Start / End Page

  • 145 - 152

International Standard Serial Number (ISSN)

  • 1550-5774

Digital Object Identifier (DOI)

  • 10.1109/DFT.2009.22

Citation Source

  • Scopus