Detouring: Translating software to circumvent hard faults in simple cores

Published

Journal Article

CMOS technology trends are leading to an increasing incidence of hard (permanent) faults in processors. These faults may be introduced at fabrication or occur in the field. Whereas high-performance processor cores have enough redundancy to tolerate many of these faults, the simple, low-power cores that are attractive for multicore chips do not. We propose Detouring, a software-based scheme for tolerating hard faults in simple cores. The key idea is to automatically modify software such that its functionality is unchanged but it does not use any of the faulty hardware. Our initial implementation of Detouring tolerates hard faults in several hardware components, including the instruction cache, registers, functional units, and the operand bypass network Detouring has no hardware cost and no performance overhead for fault-free cores. © 2008 IEEE.

Full Text

Duke Authors

Cited Authors

  • Meixner, A; Sorin, DJ

Published Date

  • October 13, 2008

Published In

  • Proceedings of the International Conference on Dependable Systems and Networks

Start / End Page

  • 80 - 89

Digital Object Identifier (DOI)

  • 10.1109/DSN.2008.4630073

Citation Source

  • Scopus