Dynamic Verification of End-to-End Multiprocessor Invariants

Published

Journal Article

As implementations of shared memory multiprocessors become more complicated, hardware faults will increasingly cause errors that are difficult or impossible to detect with low-level, localized mechanisms. In this paper, we argue for dynamic verification (i.e., on-the-fly checking) of end-to-end, system-wide invariants in shared memory multiprocessors. We develop two invariant checkers based on distributed signature analysis. Our coherence-level checker dynamically verifies that every cache coherence upgrade has a corresponding downgrade elsewhere in the system. Our message-level checker verifies that all nodes in an SMP observe the same total order of broadcast requests. We use full-system simulation to show that the checkers detect the targeted errors while not significantly degrading system performance.

Full Text

Duke Authors

Cited Authors

  • Sorin, DJ; Hill, MD; Wood, DA

Published Date

  • December 1, 2003

Published In

  • Proceedings of the International Conference on Dependable Systems and Networks

Start / End Page

  • 281 - 290

Digital Object Identifier (DOI)

  • 10.1109/DSN.2003.1209938

Citation Source

  • Scopus