Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding
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, Journal Article
Tong, QY; Lee, TH; Kim, WJ; Tan, TY; Goesele, U; You, HM; Yun, W; Sin, JKO
Published in: IEEE International SOI Conference
December 1, 1996
The feasibility of using plasma enhanced chemical vapor deposition TEOS (PETEOS) oxide and associated chemical mechanical polishing (CMP)to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding was evaluated. Results show that the PETEOS oxide can be used to create a very strong bond after annealing at temperatures as low as 300 °C.
Duke Scholars
Published In
IEEE International SOI Conference
Publication Date
December 1, 1996
Start / End Page
36 / 37
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Tong, Q. Y., Lee, T. H., Kim, W. J., Tan, T. Y., Goesele, U., You, H. M., … Sin, J. K. O. (1996). Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding. IEEE International SOI Conference, 36–37.
Tong, Q. Y., T. H. Lee, W. J. Kim, T. Y. Tan, U. Goesele, H. M. You, W. Yun, and J. K. O. Sin. “Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding.” IEEE International SOI Conference, December 1, 1996, 36–37.
Tong QY, Lee TH, Kim WJ, Tan TY, Goesele U, You HM, et al. Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding. IEEE International SOI Conference. 1996 Dec 1;36–7.
Tong, Q. Y., et al. “Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding.” IEEE International SOI Conference, Dec. 1996, pp. 36–37.
Tong QY, Lee TH, Kim WJ, Tan TY, Goesele U, You HM, Yun W, Sin JKO. Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding. IEEE International SOI Conference. 1996 Dec 1;36–37.
Published In
IEEE International SOI Conference
Publication Date
December 1, 1996
Start / End Page
36 / 37