Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding

The feasibility of using plasma enhanced chemical vapor deposition TEOS (PETEOS) oxide and associated chemical mechanical polishing (CMP)to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding was evaluated. Results show that the PETEOS oxide can be used to create a very strong bond after annealing at temperatures as low as 300 °C.

Duke Authors

Cited Authors

  • Tong, QY; Lee, TH; Kim, WJ; Tan, TY; Goesele, U; You, HM; Yun, W; Sin, JKO

Published Date

  • 1996

Published In

  • IEEE International SOI Conference

Start / End Page

  • 36 - 37

Citation Source

  • SciVal