Annotated memory references: A mechanism for informed cache management

Published

Conference Paper

As the importance of cache performance increases, allowing software to assist in cache management decisions becomes an attractive alternative. This paper focuses primarily on a mechanism for software to convey information to the memory hierarchy. We introduce a single instruction - called TAG - that can annotate subsequent memory references with a number of bits, thus avoiding major modifications to the instruction set. Simulation results show that annotating all memory reference instructions in the SPEC95 benchmarks increases execution time between 0% and 2% for both statically and dynamically scheduleded processors. We show that exposing cache management mechanisms to software can decrease the execution time of three media benchmarks (epic, pegwit, ijpeg) between 11% and 17% speedups on a 4-issue dynamically scheduled processor. © Springer-Verlag Berlin Heidelberg 1999.

Duke Authors

Cited Authors

  • Lebeck, AR; Raymond, DR; Yang, CL; Thottethodi, MS

Published Date

  • December 1, 1999

Published In

Volume / Issue

  • 1685 LNCS /

Start / End Page

  • 1251 - 1254

Electronic International Standard Serial Number (EISSN)

  • 1611-3349

International Standard Serial Number (ISSN)

  • 0302-9743

International Standard Book Number 10 (ISBN-10)

  • 3540664432

International Standard Book Number 13 (ISBN-13)

  • 9783540664437

Citation Source

  • Scopus