Evaluating cache coherent shared virtual memory for heterogeneous multicore chips

Journal Article

Although current homogeneous chips tightly couple the cores with cache-coherent shared virtual memory (CCSVM), this is not the communication paradigm used by any current heterogeneous chip. In this paper, we present a CCSVM design for a CPU/GPU chip, as well as an extension of the pthreads programming model for programming this HMC. We experimentally compare CCSVM/xthreads to a state-of-the-art CPU/GPU chip from AMD that runs OpenCL software. CCSVM's more efficient communication enables far better performance and far fewer DRAM accesses. © 2013 IEEE.

Full Text

Duke Authors

Cited Authors

  • Hechtman, BA; Sorin, DJ

Published Date

  • January 1, 2013

Published In

  • Ispass 2013 Ieee International Symposium on Performance Analysis of Systems and Software

Start / End Page

  • 118 - 119

Digital Object Identifier (DOI)

  • 10.1109/ISPASS.2013.6557152

Citation Source

  • Scopus