Stacking graphene channels in parallel for enhanced performance with the same footprint
Publication
, Journal Article
Franklin, AD; Oida, S; Farmer, DB; Smith, JT; Han, SJ; Breslin, CM; Gignac, L
Published in: IEEE Electron Device Letters
February 22, 2013
Using the unique ability of graphene to be transferred to virtually any surface, field-effect transistors are demonstrated with vertically stacked graphene channels that are electrically connected in parallel. The graphene in each layer is double gated, with all gates in the stack connected to a common gate electrode. We show that the performance of these devices scales linearly with the number of stacked graphene channels at rates of approximately 500 μAμm and 200 μSμm per layer for the on-current and peak transconductance, respectively. This demonstration reveals the ability to employ graphene in a novel fashion for tuning and amplifying the performance of a transistor without changing the device footprint. © 1980-2012 IEEE.
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Published In
IEEE Electron Device Letters
DOI
ISSN
0741-3106
Publication Date
February 22, 2013
Volume
34
Issue
4
Start / End Page
556 / 558
Related Subject Headings
- Applied Physics
- 0906 Electrical and Electronic Engineering
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Franklin, A. D., Oida, S., Farmer, D. B., Smith, J. T., Han, S. J., Breslin, C. M., & Gignac, L. (2013). Stacking graphene channels in parallel for enhanced performance with the same footprint. IEEE Electron Device Letters, 34(4), 556–558. https://doi.org/10.1109/LED.2013.2242428
Franklin, A. D., S. Oida, D. B. Farmer, J. T. Smith, S. J. Han, C. M. Breslin, and L. Gignac. “Stacking graphene channels in parallel for enhanced performance with the same footprint.” IEEE Electron Device Letters 34, no. 4 (February 22, 2013): 556–58. https://doi.org/10.1109/LED.2013.2242428.
Franklin AD, Oida S, Farmer DB, Smith JT, Han SJ, Breslin CM, et al. Stacking graphene channels in parallel for enhanced performance with the same footprint. IEEE Electron Device Letters. 2013 Feb 22;34(4):556–8.
Franklin, A. D., et al. “Stacking graphene channels in parallel for enhanced performance with the same footprint.” IEEE Electron Device Letters, vol. 34, no. 4, Feb. 2013, pp. 556–58. Scopus, doi:10.1109/LED.2013.2242428.
Franklin AD, Oida S, Farmer DB, Smith JT, Han SJ, Breslin CM, Gignac L. Stacking graphene channels in parallel for enhanced performance with the same footprint. IEEE Electron Device Letters. 2013 Feb 22;34(4):556–558.
Published In
IEEE Electron Device Letters
DOI
ISSN
0741-3106
Publication Date
February 22, 2013
Volume
34
Issue
4
Start / End Page
556 / 558
Related Subject Headings
- Applied Physics
- 0906 Electrical and Electronic Engineering