Scaleable CMOS Current-Mode Preamplifier Design for an Optical Receiver
We have designed a process-insensitive preamplifier for an optical receiver, fabricated it in several different minimum feature sizes of standard digital CMOS, and demonstrated design scaleability of this analog integrated circuit design. The same amplifier was fabricated in a 1.2 μm and two different 0.8 μm processes through the MOSIS foundry [1]. The amplifier uses a multi-stage, low-gain-per-stage approach. It has a total of 5 identical cascaded stages. Each stage is essentially a current mirror with a current gain of 3. Three of these preamplifiers have been integrated with a GaAs Metal-Semiconductor-Metal (MSM) photodetector and one with an InGaAs MSM detector by using a thin-film epilayer device separation and bonding technology [2]. This quasi monolithic front-end of an optical receiver virtually eliminates the parasitics between the photodetector and the silicon CMOS preamplifier. We have demonstrated speed and power dissipation improvement as the minimum feature size of the transistors shrink.
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Related Subject Headings
- Electrical & Electronic Engineering
- 4009 Electronics, sensors and digital hardware
- 4008 Electrical engineering
- 1005 Communications Technologies
- 0906 Electrical and Electronic Engineering
Citation
Published In
DOI
ISSN
Publication Date
Volume
Issue
Start / End Page
Related Subject Headings
- Electrical & Electronic Engineering
- 4009 Electronics, sensors and digital hardware
- 4008 Electrical engineering
- 1005 Communications Technologies
- 0906 Electrical and Electronic Engineering