A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity
Publication
, Journal Article
Pino, JL; Sculley, TL; Brooke, MA
Published in: Proceedings IEEE International Symposium on Circuits and Systems
December 1, 1990
A fast, compact process and temperature insensitive perceptron neural network is introduced. The integrated circuit proposed forms one layer in a perceptron neural network that can be easily cascaded to form a multiple-layer network. The implementation realizes practical 8-b two's complement digital weights. The perceptron implementation presented holds promise in that it has a highly predictable output independent of process parameters and thermal effects.
Duke Scholars
Published In
Proceedings IEEE International Symposium on Circuits and Systems
ISSN
0271-4310
Publication Date
December 1, 1990
Volume
2
Start / End Page
1066 / 1068
Citation
APA
Chicago
ICMJE
MLA
NLM
Pino, J. L., Sculley, T. L., & Brooke, M. A. (1990). A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity. Proceedings IEEE International Symposium on Circuits and Systems, 2, 1066–1068.
Pino, J. L., T. L. Sculley, and M. A. Brooke. “A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity.” Proceedings IEEE International Symposium on Circuits and Systems 2 (December 1, 1990): 1066–68.
Pino JL, Sculley TL, Brooke MA. A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity. Proceedings IEEE International Symposium on Circuits and Systems. 1990 Dec 1;2:1066–8.
Pino, J. L., et al. “A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity.” Proceedings IEEE International Symposium on Circuits and Systems, vol. 2, Dec. 1990, pp. 1066–68.
Pino JL, Sculley TL, Brooke MA. A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity. Proceedings IEEE International Symposium on Circuits and Systems. 1990 Dec 1;2:1066–1068.
Published In
Proceedings IEEE International Symposium on Circuits and Systems
ISSN
0271-4310
Publication Date
December 1, 1990
Volume
2
Start / End Page
1066 / 1068