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Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors

Publication ,  Conference
Lebeck, AR; Wood, DA
Published in: ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings
January 1, 1995

This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages by having a processor automatically invalidate its local copy of a cache block before a conflicting access by another processor. Eliminating invalidation overhead is particularly important under sequential consistency, where the latency of invalidating outstanding copies can increase a program's critical path. DSI is applicable to software, hardware, and hybrid coherence schemes. In this paper we evaluate DSI in the context of hardware directory-based write-invalidate coherence protocols. Our results show that DSI reduces execution time of a sequentially consistent full-map coherence protocol by as much as 41%. This is comparable to an implementation of weak consistency that uses a coalescing write-buffer to allow up to 16 outstanding requests for exclusive blocks. When used in conjunction with weak consistency. DSI can exploit tear-off blocks - which eliminate both invalidation and acknowledgment messages - for a total reduction in messages of up to 26%.

Duke Scholars

Published In

ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings

Publication Date

January 1, 1995

Start / End Page

48 / 59
 

Citation

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Lebeck, A. R., & Wood, D. A. (1995). Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors. In ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings (pp. 48–59).
Lebeck, A. R., and D. A. Wood. “Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors.” In ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings, 48–59, 1995.
Lebeck AR, Wood DA. Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors. In: ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings. 1995. p. 48–59.
Lebeck, A. R., and D. A. Wood. “Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors.” ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings, 1995, pp. 48–59.
Lebeck AR, Wood DA. Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors. ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings. 1995. p. 48–59.

Published In

ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings

Publication Date

January 1, 1995

Start / End Page

48 / 59