Benjamin C Lee | Scholars@Duke

Benjamin C Lee
Adjunct Professor in the Department of Electrical and Computer Engineering

Benjamin Lee's research focuses on computer architecture and systems, energy efficiency, performance modeling, and algorithmic economics for resource management. He is also interested in policy for environmentally sustainable information technology infrastructure.

Lee held an NSF Computing Innovation Fellowship at Stanford University (2009). He also held visiting research positions at Microsoft Research (2008), Intel Corporation (2007), and Lawrence Livermore National Laboratory (2006). He earned his B.S. from the University of California at Berkeley (2004) and his S.M., Ph.D. from Harvard University (2008).

Current Research Interests

Computer architecture and systems, energy efficiency, performance modeling, and algorithmic economics for resource management; policy for environmentally sustainable information technology infrastructure

Current Appointments & Affiliations

Adjunct Professor in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2020
Adjunct Professor of Computer Science, Computer Science, Trinity College of Arts & Sciences 2020
Faculty Network Member of The Energy Initiative, Nicholas Institute-Energy Initiative, Initiatives 2012

Contact Information

210 Hudson Hall, Box 90291, Durham, NC 27705
210 Hudson Hall, Box 90291, Durham, NC 27708
benjamin.c.lee@duke.edu (919) 660-5043
http://duke.edu/~bcl15/

Background
Education, Training, & Certifications
- Ph.D., Harvard University 2008
Previous Appointments & Affiliations
- Associate Professor in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2015 - 2020
- Associate Professor of Computer Science, Computer Science, Trinity College of Arts & Sciences 2015 - 2020
- Assistant Professor in the Department of Computer Science, Computer Science, Trinity College of Arts & Sciences 2010 - 2015
- Assistant Professor in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2010 - 2015
- Nortel Networks Assistant Professor of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2013 - 2015
Recognition
Awards & Honors
Expertise
Subject Headings
Research
Selected Grants
- IUCRC Proposal Phase 1 Duke: Center for Alternative Sustainable and Intelligent Computing (ASIC) awarded by National Science Foundation 2018 - 2023
- Assurance Cases for Certification via Efficient Learning, Evaluated Rapidly and Automatically using Theory of Evidence (ACCELERATE) awarded by Johns Hopkins University Applied Physics Laboratory 2020 - 2022
- Dynamic Power Allocation for Efficient System-on-Chip Scaling awarded by Semiconductor Research Corp. 2018 - 2020
- SHF: Small: Game-Theoretic Foundations for Task Co-Location awarded by National Science Foundation 2015 - 2020
- AF: Medium: Collaborative Research: Multi-dimensional Scheduling and Resource Allocation in Data Centers awarded by National Science Foundation 2014 - 2020
- XPS: CLCCA: Allocating Heterogeneous Datacenter Hardware to Strategic Agents awarded by National Science Foundation 2013 - 2019
- CAREER: Foundations for Heterogeneous Datacenter Design and Deployment awarded by National Science Foundation 2012 - 2018
- The Center for Future Architectures Research (C-FAR) awarded by University of Michigan 2013 - 2017
- NSF XPS Workshop for Exploiting Parallelism and Scalability awarded by Virginia Polytechnic Institute 2014 - 2015
External Relationships
- Facebook Coporation
- University of Pennsylvania
Publications & Artistic Works
Selected Publications
- Books
  - Lee, B. C. Datacenter Design and Management: A Computer Architect's Perspective. Vol. 11, 2016. https://doi.org/10.2200/S00693ED1V01Y201601CAC037.
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- Academic Articles
  - Zahedi, S. M., and B. C. Lee. “Sharing Incentives and Fair Division for Multiprocessors.” Ieee Micro 35, no. 3 (May 1, 2015): 92–100. https://doi.org/10.1109/MM.2015.49.
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  - Zahedi, S. M., and B. C. Lee. “REF: Resource elasticity fairness with sharing incentives for multiprocessors.” International Conference on Architectural Support for Programming Languages and Operating Systems Asplos, March 14, 2014, 145–59. https://doi.org/10.1145/2541940.2541962.
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  - Guevara, M., B. Lubin, and B. C. Lee. “Market mechanisms for managing datacenters with heterogeneous microarchitectures.” Acm Transactions on Computer Systems 32, no. 1 (February 1, 2014). https://doi.org/10.1145/2541258.
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  - Guevara, M., B. Lubin, and B. C. Lee. “Strategies for anticipating risk in heterogeneous system design.” Proceedings International Symposium on High Performance Computer Architecture, January 1, 2014, 154–64. https://doi.org/10.1109/HPCA.2014.6835926.
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  - Bragg, E., M. Guevara, and B. C. Lee. “Understanding query complexity and its implications for energy-efficient web search.” Proceedings of the International Symposium on Low Power Electronics and Design, December 11, 2013, 401. https://doi.org/10.1109/ISLPED.2013.6629330.
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  - Xi, S. L., M. Guevara, J. Nelson, P. Pensabene, and B. C. Lee. “Understanding the critical path in power state transition latencies.” Proceedings of the International Symposium on Low Power Electronics and Design, December 11, 2013, 317–22. https://doi.org/10.1109/ISLPED.2013.6629316.
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  - Guevara, M., B. Lubin, and B. C. Lee. “Navigating heterogeneous processors with market mechanisms.” Proceedings International Symposium on High Performance Computer Architecture, July 23, 2013, 95–106. https://doi.org/10.1109/HPCA.2013.6522310.
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  - Ham, T. J., B. K. Chelepalli, N. Xue, and B. C. Lee. “Disintegrated control for energy-efficient and heterogeneous memory systems.” Proceedings International Symposium on High Performance Computer Architecture, July 23, 2013, 424–35. https://doi.org/10.1109/HPCA.2013.6522338.
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  - Malladi, K. T., I. Shaeffer, L. Gopalakrishnan, D. Lo, B. C. Lee, and M. Horowitz. “Rethinking DRAM power modes for energy proportionality.” Proceedings 2012 Ieee/Acm 45th International Symposium on Microarchitecture, Micro 2012, December 1, 2012, 131–42. https://doi.org/10.1109/MICRO.2012.21.
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  - Wu, W., and B. C. Lee. “Inferred models for dynamic and sparse hardware-software spaces.” Proceedings 2012 Ieee/Acm 45th International Symposium on Microarchitecture, Micro 2012, December 1, 2012, 413–24. https://doi.org/10.1109/MICRO.2012.45.
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  - Malladi, K. T., F. A. Nothaft, K. Periyathambi, B. C. Lee, C. Kozyrakis, and M. Horowitz. “Towards energy-proportional datacenter memory with mobile DRAM.” Proceedings International Symposium on Computer Architecture, August 15, 2012, 37–48. https://doi.org/10.1109/ISCA.2012.6237004.
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  - Hameed, R., W. Qadeer, M. Wachs, O. Azizi, A. Solomatnikov, B. C. Lee, S. Richardson, C. Kozyrakis, and M. Horowitz. “Understanding sources of inefficiency in general-purpose chips.” Communications of the Acm 54, no. 10 (October 1, 2011): 85–93. https://doi.org/10.1145/2001269.2001291.
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  - Reddi, V. J., B. C. Lee, T. Chilimbi, and K. Vaid. “Mobile processors for energy-efficient web search.” Acm Transactions on Computer Systems 29, no. 3 (August 1, 2011). https://doi.org/10.1145/2003690.2003693.
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  - Reddi, V. J., B. C. Lee, T. Chilimbi, and K. Vaid. “Mobile processors for energy-efficient web search.” Acm Transactions on Computer Systems (Tocs) 29, no. 4 (2011): 1–39.
  - Shacham, O., O. Azizi, M. Wachs, W. Qadeer, Z. Asgar, K. Kelley, J. P. Stevenson, et al. “Rethinking digital design: Why design must change.” Ieee Micro 30, no. 6 (November 1, 2010): 9–24. https://doi.org/10.1109/MM.2010.81.
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  - Lee, B. C., and D. Brooks. “Applied inference: Case studies in microarchitectural design.” Transactions on Architecture and Code Optimization 7, no. 2 (September 1, 2010). https://doi.org/10.1145/1839667.1839670.
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  - Azizi, O., A. Mahesri, B. C. Lee, S. J. Patel, and M. Horowitz. “Energy-performance tradeoffs in processor architecture and circuit design: A marginal cost analysis.” Proceedings International Symposium on Computer Architecture, August 2, 2010, 26–36. https://doi.org/10.1145/1815961.1815967.
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  - Hameed, R., W. Qadeer, M. Wachs, O. Azizi, A. Solomatnikov, B. C. Lee, S. Richardson, C. Kozyrakis, and M. Horowitz. “Understanding sources of inefficiency in general-purpose chips.” Proceedings International Symposium on Computer Architecture, August 2, 2010, 37–47. https://doi.org/10.1145/1815961.1815968.
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  - Reddi, V. J., B. C. Lee, T. Chilimbi, and K. Vaid. “Web search using mobile cores: Quantifying and mitigating the price of efficiency.” Proceedings International Symposium on Computer Architecture, August 2, 2010, 314–25. https://doi.org/10.1145/1815961.1816002.
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  - Shacham, O., O. Azizi, M. Wachs, W. Qadeer, Z. Asgar, K. Kelley, P. Stevenson, et al. “Why design must change: Rethinking digital design.” Ieee Micro, August 2010.
  - Lee, B. C., E. Ipek, O. MutIu, and D. Burger. “Phase change memory architecture and the quest for scalability.” Communications of the Acm 53, no. 7 (July 1, 2010): 99–106. https://doi.org/10.1145/1785414.1785441.
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  - Lee, B. C., P. Zhou, J. Yang, Y. Zhang, B. Zhao, E. Ipek, O. Mutlu, and D. Burger. “Phase-change technology and the future of main memory.” Ieee Micro 30, no. 1 (January 1, 2010): 131–41. https://doi.org/10.1109/MM.2010.24.
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  - Condit, J., E. B. Nightingale, C. Frost, E. Ipek, B. Lee, D. Burger, and D. Coetzee. “Better I/O through byte-addressable, persistent memory.” Sosp’09 Proceedings of the 22nd Acm Sigops Symposium on Operating Systems Principles, December 24, 2009, 133–46. https://doi.org/10.1145/1629575.1629589.
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  - Liang, X., B. C. Lee, G. Y. Wei, and D. Brooks. “Design and test strategies for microarchitectural post-fabrication tuning.” Proceedings Ieee International Conference on Computer Design: Vlsi in Computers and Processors, December 1, 2009, 84–90. https://doi.org/10.1109/ICCD.2009.5413170.
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  - Lovin, K., B. C. Lee, X. Liang, D. Brooks, and G. Y. Wei. “Empirical performance models for 3T1D memories.” Proceedings Ieee International Conference on Computer Design: Vlsi in Computers and Processors, December 1, 2009, 398–403. https://doi.org/10.1109/ICCD.2009.5413124.
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  - Lee, B. C., E. Ipek, O. Mutlu, and D. Burger. “Architecting phase change memory as a scalable DRAM alternative.” Proceedings International Symposium on Computer Architecture, November 30, 2009, 2–13. https://doi.org/10.1145/1555754.1555758.
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  - Lee, B. C., and D. Brooks. “Roughness of microarchitectural design topologies and its implications for optimization.” Proceedings International Symposium on High Performance Computer Architecture, December 24, 2008, 240–51. https://doi.org/10.1109/HPCA.2008.4658643.
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  - Lee, B. C., J. Collins, H. Wang, and D. Brooks. “CPR: Composable performance regression for scalable multiprocessor models.” Proceedings of the Annual International Symposium on Microarchitecture, Micro, no. 2008 PROCEEDINGS (December 1, 2008): 270–81. https://doi.org/10.1109/MICRO.2008.4771797.
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  - Lee, B. C., and D. Brooks. “Efficiency trends and limits from comprehensive microarchitectural adaptivity.” Acm Sigplan Notices 43, no. 3 (January 1, 2008): 36–47. https://doi.org/10.1145/1353536.1346288.
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  - Lee, B. C., and D. Brooks. “Efficiency trends and limits from comprehensive microarchitectural adaptivity.” Operating Systems Review (Acm) 42, no. 2 (January 1, 2008): 36–47. https://doi.org/10.1145/1353535.1346288.
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  - Lee, B. C., D. M. Brooks, B. R. De Supinski, M. Schulz, K. Singh, and S. A. McKee. “Methods of inference and learning for performance modeling of parallel applications.” Proceedings of the Acm Sigplan Symposium on Principles and Practice of Parallel Programming, Ppopp, October 1, 2007, 249–58. https://doi.org/10.1145/1229428.1229479.
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  - Lee, B. C., and D. M. Brooks. “Illustrative design space studies with microarchitectural regression models.” Proceedings International Symposium on High Performance Computer Architecture, August 10, 2007, 340–51. https://doi.org/10.1109/HPCA.2007.346211.
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  - Lee, B. C., and D. Brooks. “A tutorial in spatial sampling and regression strategies for microarchitectural analysis.” Ieee Micro, Special Issue on Hot Tutorials 27, no. 3 (May 2007): 74–93.
  - Lee, B. C., and D. M. Brooks. “Spatial sampling and regression strategies.” Ieee Micro 27, no. 3 (May 1, 2007): 74–93. https://doi.org/10.1109/MM.2007.61.
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  - Lit, Y., B. Lee, D. Brooks, Z. Hu, and K. Skadron. “Impact of thermal constraints on multi-core architectures.” Thermomechanical Phenomena in Electronic Systems Proceedings of the Intersociety Conference 2006 (December 22, 2006): 132–39. https://doi.org/10.1109/ITHERM.2006.1645333.
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  - Lee, B. C. “Statistical inference for efficient microarchitectural and application analysis.” Proceedings of the 2006 Acm/Ieee Conference on Supercomputing, Sc’06, December 1, 2006. https://doi.org/10.1145/1188455.1188591.
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  - Lee, B. C., and D. M. Brooks. “Accurate and efficient regression modeling for microarchitectural performance and power prediction.” International Conference on Architectural Support for Programming Languages and Operating Systems Asplos, December 1, 2006, 185–94. https://doi.org/10.1145/1168857.1168881.
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  - Li, Y., B. Lee, D. Brooks, Z. Hu, and K. Skadron. “CMP design space exploration subject to physical constraints.” Proceedings International Symposium on High Performance Computer Architecture 2006 (September 26, 2006): 15–26. https://doi.org/10.1109/HPCA.2006.1598109.
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  - Lee, B. C., and D. M. Brooks. “Accurate and efficient regression modeling for microarchitectural performance and power prediction.” Acm Sigplan Notices 41, no. 11 (January 1, 2006): 185–94. https://doi.org/10.1145/1168918.1168881.
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  - Lee Benjamin, B. C., R. W. Vuduc, J. W. Demmel, and K. A. Yelick. “Performance models for evaluation and automatic tuning of symmetric sparse matrix-vector multiply.” Proceedings of the International Conference on Parallel Processing, December 17, 2004, 169–76.
- Conference Papers
  - Lee, B. C. “Message from the general chair.” In Ispass 2015 Ieee International Symposium on Performance Analysis of Systems and Software, vi, 2015. https://doi.org/10.1109/ISPASS.2015.7095776.
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  - Lee, B. C. “Message from the program chair.” In Ispass 2014 Ieee International Symposium on Performance Analysis of Systems and Software, 2014. https://doi.org/10.1109/ISPASS.2014.6844453.
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  - Chen, H. H., and M. Daneshmand. “Message from the general co-chairs.” In 2010 the 5th Annual Icst Wireless Internet Conference, Wicon 2010, 2010.
Scholarly, Clinical, & Service Activities
Outreach & Engaged Scholarship
- Bass Connections Faculty Team Member. Data+ Project Lead. 2018 2018

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Education, Training, & Certifications

Previous Appointments & Affiliations

Awards & Honors

Subject Headings

Selected Grants

External Relationships

Selected Publications

Books

Academic Articles

Conference Papers

Outreach & Engaged Scholarship