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Yiran Chen

John Cocke Distinguished Professor of Electrical and Computer Engineering
Electrical and Computer Engineering
130 Hudson Hall, PO Box 90291, Durham, NC 27708
405 Wilkison Building, 534 Research Dr., Durham, NC 27705
Office hours Appointment only.  

Overview


Yiran Chen received his B.S. in 1998 and M.S. in 2001 from Tsinghua University, and his Ph.D. in 2005 from Purdue University. In 2010, he joined the University of Pittsburgh as an Assistant Professor. He was promoted to Associate Professor with tenure in 2014, while holding the Bicentennial Alumni Faculty Fellowship. He is currently the John Cocke Distinguished Professor of Electrical and Computer Engineering at Duke University. He is the director of the National Science Foundation (NSF) AI Institute for Edge Computing Leveraging Next-generation Networks (Athena), one of the 25 National AI Institutes in the United States, as well as the NSF Industry-University Cooperative Research Center (IUCRC) for Alternative Sustainable and Intelligent Computing (ASIC), and co-director of the Duke Center for Computational Evolutionary Intelligence (DCEI). His group's research focuses on new memory and storage systems, machine learning and neuromorphic computing systems, and mobile computing. He has supervised or is currently supervising, more than 60 Ph.D. students and 4 Postdocs throughout his academic career. 14 of his Ph.D. students and Postdocs have joined faculties at universities in the United States, Turkey, Hong Kong, and China, including 4 NSF CAREER Awardees.

Chen has published one book and more than 600 technical publications and has been granted 96 US patents. He has been honored with 15 paper awards, including two test-of-time awards, and the other 16 best paper nominations from international journals and conferences. He has received numerous awards for his technical contributions and professional services. He is one of only three individuals to have received Technical Achievement Awards from both the IEEE Circuits and Systems Society and the Computer Society, with histories of 75 and 78 years, respectively. He has been a distinguished lecturer for the IEEE Council on Electronic Design Automation (CEDA) and Circuits and Systems Society (CASS), and a distinguished visitor of the IEEE Computer Society (CS). He is a Fellow of the AAAS, ACM, IEEE, and NAI, and currently serves as the chair of ACM SIGDA. He was the Editor-in-Chief of the IEEE Circuits and Systems Magazine from 2020 to 2023 and is the inaugural Editor-in-Chief of the IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI).

Chen has served as Chairman of the Board, Independent Director, and in other consultancy roles for several startups. Beyond his academic and professional pursuits, Chen is a fervent advocate for the responsible use of AI technologies and champions academic belonging, openness, freedom, and equality. He is a founding member of the steering committee of the Academic Alliance on AI Policy (AAAIP) and a member of the Asian American Scholar Forum (AASF).

Current Appointments & Affiliations


John Cocke Distinguished Professor of Electrical and Computer Engineering · 2023 - Present Electrical and Computer Engineering, Pratt School of Engineering
Professor in the Department of Electrical and Computer Engineering · 2019 - Present Electrical and Computer Engineering, Pratt School of Engineering
Professor of Computer Science · 2019 - Present Computer Science, Trinity College of Arts & Sciences

In the News


Published May 4, 2023
Duke Awards 44 Distinguished Professorships
Published January 31, 2023
Three Duke Faculty Elected AAAS Fellows
Published July 29, 2021
NSF Launches Artificial Intelligence Research Center at Duke

View All News

Recent Publications


DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent

Conference Proceedings of the International Symposium on Physical Design · March 16, 2025 In advanced technology nodes, the integrated design rule checker (DRC) is often utilized in place and route tools for fast optimization loops for power-performance-area. Implementing integrated DRC checkers to meet the standard of commercial DRC tools dema ... Full text Cite

PRICING: Privacy-Preserving Circuit Data Sharing Framework for Lithographic Hotspot Detection

Conference Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC · March 4, 2025 To apply machine learning (ML) techniques for electronic design automation (EDA), training models on diverse datasets is essential for model reliability and generalizability, especially when applied to modern circuits. However, data availability remains a ... Full text Cite

Rethinking Latency-Aware DNN Design With GPU Tail Effect Analysis

Journal Article IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · January 1, 2025 As the size of deep neural networks (DNNs) continues to grow, their runtime latency also scales. While model pruning and neural architecture search (NAS) can effectively reduce the computation workload, their effectiveness fails to consistently translate i ... Full text Cite
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Recent Grants


DoD Center of Excellence in Advanced Computing and Software (COE-ACS)

ResearchPrincipal Investigator · Awarded by Georgia State University · 2023 - 2028

Collaborative Research: FuSe: Efficient Situation-Aware AI Processing in Advanced 2-Terminal SOT-MRAM

ResearchPrincipal Investigator · Awarded by National Science Foundation · 2023 - 2026

AI Institute: Athena: AI-Driven Next-generation Networks at the Edge

ResearchPrincipal Investigator · Awarded by National Science Foundation · 2021 - 2026

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Education, Training & Certifications


Purdue University · 2005 Ph.D.