Yiran Chen
Professor in the Department of Electrical and Computer Engineering
Yiran Chen
received B.S. (1998) and M.S. (2001) from Tsinghua University and Ph.D. (2005) from Purdue University. After five years in the industry, he joined the University of Pittsburgh in 2010 as Assistant Professor and was promoted to Associate Professor with tenure in 2014, holding Bicentennial Alumni Faculty Fellow. He is now the John Cocke Distinguished Professor of Electrical and Computer Engineering at Duke University and serving as the director of the NSF AI Institute for Edge Computing Leveraging the Next-generation Networks (Athena), the NSF Industry-University Cooperative Research Center (IUCRC) for Alternative Sustainable and Intelligent Computing (ASIC), and the co-director of Duke Center for Computational Evolutionary Intelligence (DCEI). His group focuses on the research of new memory and storage systems, machine learning and neuromorphic computing, and mobile computing systems. Dr. Chen has published 1 book and about 600 technical publications and has been granted 96 US patents. He has served as the associate editor of more than a dozen international academic periodicals and served on the technical and organization committees of about 70 international conferences. He is now serving as the Editor-in-Chief of the IEEE Circuits and Systems Magazine. He received 9 best paper awards, 1 best poster award, and 15 best paper nominations from international conferences and workshops. He received numerous awards for his technical contributions and professional services such as the IEEE CASS Charles A. Desoer Technical Achievement Award, the IEEE Computer Society Edward J. McCluskey Technical Achievement Award, etc. He has been the distinguished lecturer of IEEE CEDA and CAS. He is a Fellow of the AAAS, ACM, and IEEE, and now serves as the chair of ACM SIGDA.
Current Research Interests
Emerging memory and storage technologies
Embedded systems, CPS, edge computing, and mobile applications
Neuromorphic computing, deep learning and system security
Low power circuit and system
Office Hours
Appointment only.
Current Appointments & Affiliations
- Professor in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2019
- Professor of Computer Science, Computer Science, Trinity College of Arts & Sciences 2019
Contact Information
- 130 Hudson Hall, PO Box 90291, Durham, NC 27708
- 405 Wilkison Building, 534 Research Dr., Durham, NC 27705
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yiran.chen@duke.edu
(919) 660-1372
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Duke Center of Computational Evolutionary Intelligence (CEI)
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Google Scholar Page
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NSF AI Institute for Edge Computing Leveraging Next Generation Networks (Athena)
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NSF IUCRC for Alternative Sustainable and Intelligent Computing (ASIC)
- Background
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Education, Training, & Certifications
- Ph.D., Purdue University 2005
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Previous Appointments & Affiliations
- Associate Professor in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2017 - 2019
- Associate Professor of Computer Science, Computer Science, Trinity College of Arts & Sciences 2018 - 2019
- Adjunct Associate Professor in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2016
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Leadership & Clinical Positions at Duke
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Director of NSF AI Institute for Edge Computing Leveraging Next Generation Networks (Athena)
Director of NSF IUCRC for Alternative Sustainable and Intelligent Computing (ASIC)
Co-director of Duke Center for Computational Evolutionary Intelligence (CEI)
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Director of NSF AI Institute for Edge Computing Leveraging Next Generation Networks (Athena)
- Recognition
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In the News
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MAY 4, 2023 Duke Today -
JAN 31, 2023 Duke Today -
JUL 29, 2021 -
JAN 3, 2017
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Awards & Honors
- Charles A. Desoer Technical Achievement Award. Institute of Electrical and Electronics Engineers (IEEE), Circuits and Systems Society. 2023
- Distinguished Lecturer. IEEE Circuits and Systems Society. 2023
- AAAS Fellow. American Association for the Advancement of Science. 2022
- Edward J. McCluskey Technical Achievement Award. Institute of Electrical and Electronics Engineers (IEEE), Computer Society. 2022
- Stansell Family Distinguished Research Award. Pratt School of Engineering, Duke University. 2022
- Clarivate Highly Cited Researchers. Clarivate. 2021
- Outstanding Electrical and Computer Engineer (OECE) Award. Purdue’s School of Electrical and Computer Engineering. 2021
- ACM Fellow. Association for Computing Machinery. 2020
- HPCA Hall of Fame. IEEE Computer Society, Technical Committee on Computer Architecture. 2020
- Distinguished Lecturer. IEEE Council on Electronic Design Automation. 2018
- IEEE Fellow. Institute of Electrical and Electronics Engineers. 2018
- Outstanding New Faculty Award . ACM’s Special Interest Group on Design Automation (SIGDA). 2014
- National Science Foundation CAREER Awards - Multiple Sciences. National Science Foundation (NSF). 2013
- Research
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Selected Grants
- AI Institute: Athena: AI-Driven Next-generation Networks at the Edge awarded by National Science Foundation 2021 - 2026
- Collaborative Research: SHF: Medium: Revitalizing EDA from a Machine Learning Perspective awarded by National Science Foundation 2021 - 2025
- Collaborative Research: CCRI:NEW: Research Infrastructure for Real-Time Computer Vision and Decision Making via Mobile Robots awarded by National Science Foundation 2021 - 2024
- FET: Small:RESONANCE:Accelerating Speech/Language Processing through Collective Training using Commodity ReRAM Chips awarded by National Science Foundation 2019 - 2023
- Operating at the intersection of Out-of-distribution detection and adversarial machine learning awarded by Air Force Research Laboratory 2021 - 2023
- Distributed Heterogenous Data Analytics via Federated Learning awarded by National Science Foundation 2021 - 2023
- Collaborative Research: Two-dimensional Synaptic Array for Advanced Hardware Acceleration of Deep Neural Networks awarded by National Science Foundation 2020 - 2023
- IUCRC Proposal Phase 1 Duke: Center for Alternative Sustainable and Intelligent Computing (ASIC) awarded by National Science Foundation 2018 - 2023
- Acceleration for Adversarial Machine Learning (AML) awarded by Army Research Office 2019 - 2023
- Collaborative Workshop Proposal: Redefining the Future of Computer Architecture from First Principles awarded by National Science Foundation 2022 - 2023
- RTML: Large: Collaborative: Harmonizing Predictive Algorithms and Mixed Signal/Precision Circuits via Computation-Data Access Exchange and Adaptive Dataflows awarded by National Science Foundation 2019 - 2022
- SPX: Collaborative Research: Ula! - An Integrated DNN Acceleration Framework with Enhanced Unsupervised Learning Capability awarded by National Science Foundation 2017 - 2022
- A Collaborative Machine Learning Approach to Fast and High-Fidelity Design Prediction awarded by The University of Texas at Dallas 2019 - 2021
- Workshop Proposal: Processing-In-Memory (PIM) Technology - Grand Challenges and Killer Applications awarded by National Science Foundation 2020 - 2021
- Exploring Vulnerability & Robustness of Deep Learning Systems awarded by Air Force Research Laboratory 2018 - 2021
- CCRI: Planning: Collaborative Research: Low-Power Computer Vision Platform awarded by National Science Foundation 2019 - 2020
- CSR: Small: Collaborative Research: EUReCa: Enabling Untethered VR/AR System via Human-centric Graphic Computing and Distributed Data Processing awarded by National Science Foundation 2017 - 2020
- SMALE: Enhancing Scalability of Machine Learning Algorithms on Extreme Scale Computing Platforms awarded by Department of Energy 2017 - 2020
- SHF:Small: Cross-Platform Solutions for Pruning and Accelerating Neural Models awarded by National Science Foundation 2017 - 2019
- NeoNexus: The Next-generation Information Processing System across Digital and Neuromorphic Computing Domains awarded by National Science Foundation 2017 - 2018
- Planning IUCRC Duke University: Center for Alternative Sustainable and Intelligent Computing awarded by National Science Foundation 2017 - 2018
- "CAREER: Centaur: A Bio-inspired Ultra Low Power Hybrid Embedded Computing Engine Beyond One TeraFlops/Watts" awarded by National Science Foundation 2017 - 2018
- The Design of Neuromorphic Controller System Built with Memristor Crossbars awarded by University of Pittsburgh 2017
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External Relationships
- A*STAR Singapore
- AI Chip Center for Emerging Smart Systems (ACCESS)
- American University in Cairo
- City University of Hong Kong
- FELLOWS FUND, LLC
- Institute of Electrical and Electronics Engineers
- International Conference on Neuromorphic Computing
- Khalifa University
- National Science Foundation
- NeoNexus Group
- Northeastern University
- Research Grants Council of Hong Kong
- Texas A&M University at Qatar
- The Hong Kong Polytechnic University
- The University of Hong Kong
- University of Florida
- University of Kansas
- Publications & Artistic Works
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Selected Publications
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Books
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Fang, L., Y. Chen, G. Zhai, J. Wang, R. Wang, and W. Dong. Preface. Vol. 13069 LNAI, 2021.
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Fang, L., Y. Chen, G. Zhai, J. Wang, R. Wang, and W. Dong. Preface. Vol. 13070 LNAI, 2021.
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Sangvai, Devdutta G., and Anthony J. Viera. Preface. Vol. 46, 2019. https://doi.org/10.1016/j.pop.2019.09.001.Full Text Link to Item
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Li, H., and Y. Chen. Nonvolatile memory design: Magnetic, resistive, and phase change, 2017. https://doi.org/10.1201/b11354.Full Text
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Academic Articles
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Hanson, E., S. Li, X. Qian, H. H. Li, and Y. Chen. “DyNNamic: Dynamically Reshaping, High Data-Reuse Accelerator for Compact DNNs.” Ieee Transactions on Computers 72, no. 3 (March 1, 2023): 880–92. https://doi.org/10.1109/TC.2022.3184272.Full Text
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Lyu, Bo, Shiping Wen, Yin Yang, Xiaojun Chang, Junwei Sun, Yiran Chen, and Tingwen Huang. “Designing Efficient Bit-Level Sparsity-Tolerant Memristive Networks.” Ieee Transactions on Neural Networks and Learning Systems PP (March 2023). https://doi.org/10.1109/tnnls.2023.3250437.Full Text
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Pang, Meng, Binghui Wang, Mang Ye, Yiu-Ming Cheung, Yiran Chen, and Bihan Wen. “DisP+V: A Unified Framework for Disentangling Prototype and Variation From Single Sample per Person.” Ieee Transactions on Neural Networks and Learning Systems 34, no. 2 (February 2023): 867–81. https://doi.org/10.1109/tnnls.2021.3103194.Full Text
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Hu, S., Y. Chen, Q. Zhu, and A. W. Colombo. “Guest Editorial Machine Learning for Resilient Industrial Cyber-Physical Systems.” Ieee Transactions on Automation Science and Engineering 20, no. 1 (January 1, 2023): 3–4. https://doi.org/10.1109/TASE.2022.3223583.Full Text
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Li, Z., Q. Zheng, Y. Chen, and H. Li. “SpikeSen: Low-latency In-sensor-intelligence Design with Neuromorphic Spiking Neurons.” Ieee Transactions on Circuits and Systems Ii: Express Briefs, January 1, 2023. https://doi.org/10.1109/TCSII.2023.3235888.Full Text
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Wu, C., X. Yang, Y. Chen, and M. Li. “Photonic Bayesian Neural Network Using Programmed Optical Noises.” Ieee Journal of Selected Topics in Quantum Electronics 29, no. 2 (January 1, 2023). https://doi.org/10.1109/JSTQE.2022.3217819.Full Text
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Liu, F., W. Zhao, Z. Wang, Y. Zhao, T. Yang, Y. Chen, and L. Jiang. “IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 41, no. 12 (December 1, 2022): 5313–26. https://doi.org/10.1109/TCAD.2022.3156017.Full Text
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Zheng, Q., X. Li, Y. Guan, Z. Wang, Y. Cai, Y. Chen, G. Sun, and R. Huang. “PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 41, no. 12 (December 1, 2022): 5464–75. https://doi.org/10.1109/TCAD.2022.3160947.Full Text
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Li, T., N. Jing, J. Jiang, Q. Wang, Z. Mao, and Y. Chen. “A Novel Architecture Design for Output Significance Aligned Flow with Adaptive Control in ReRAM-based Neural Network Accelerator.” Acm Transactions on Design Automation of Electronic Systems 27, no. 6 (November 22, 2022). https://doi.org/10.1145/3510819.Full Text
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Chen, Y., and Q. Qiu. “Guest Editorial: IEEE TC Special Issue on Software, Hardware and Applications for Neuromorphic Computing.” Ieee Transactions on Computers 71, no. 11 (November 1, 2022): 2705–6. https://doi.org/10.1109/TC.2022.3208389.Full Text
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Xie, Z., R. Liang, X. Xu, J. Hu, C. C. Chang, J. Pan, and Y. Chen. “Preplacement Net Length and Timing Estimation by Customized Graph Neural Network.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 41, no. 11 (November 1, 2022): 4667–80. https://doi.org/10.1109/TCAD.2022.3149977.Full Text
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Wang, C., D. Feng, W. Tong, J. Liu, B. Wu, and Y. Chen. “Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 41, no. 10 (October 1, 2022): 3479–91. https://doi.org/10.1109/TCAD.2021.3123591.Full Text
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Li, T., N. Jing, Z. Mao, and Y. Chen. “A Hybrid-Grained Remapping Defense Scheme Against Hard Failures for Row-Column-NVM.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 41, no. 6 (June 1, 2022): 1842–54. https://doi.org/10.1109/TCAD.2021.3097288.Full Text
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Taylor, B., Q. Zheng, Z. Li, S. Li, and Y. Chen. “Processing-in-Memory Technology for Machine Learning: From Basic to ASIC.” Ieee Transactions on Circuits and Systems Ii: Express Briefs 69, no. 6 (June 1, 2022): 2598–2603. https://doi.org/10.1109/TCSII.2022.3168404.Full Text
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Mao, J., Q. Yang, A. Li, K. W. Nixon, H. Li, and Y. Chen. “Toward Efficient and Adaptive Design of Video Detection System with Deep Neural Networks.” Acm Transactions on Embedded Computing Systems 21, no. 3 (May 1, 2022). https://doi.org/10.1145/3484946.Full Text
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Yang, X., B. Taylor, A. Wu, Y. Chen, and L. O. Chua. “Research Progress on Memristor: From Synapses to Computing Systems.” Ieee Transactions on Circuits and Systems I: Regular Papers 69, no. 5 (May 1, 2022): 1845–57. https://doi.org/10.1109/TCSI.2022.3159153.Full Text
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Chen, Y., and Y. Wang. “A survey of architectures of neural network accelerators.” Scientia Sinica Informationis 52, no. 4 (April 1, 2022): 596–611. https://doi.org/10.1360/SSI-2021-0409.Full Text
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Inkawhich, N., J. Zhang, E. K. Davis, R. Luley, and Y. Chen. “Improving Out-of-Distribution Detection by Learning from the Deployment Environment.” Ieee Journal of Selected Topics in Applied Earth Observations and Remote Sensing 15 (January 1, 2022): 2070–86. https://doi.org/10.1109/JSTARS.2022.3146362.Full Text
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Wu, Changming, Xiaoxuan Yang, Heshan Yu, Ruoming Peng, Ichiro Takeuchi, Yiran Chen, and Mo Li. “Harnessing optoelectronic noises in a photonic generative network.” Science Advances 8, no. 3 (January 2022): eabm2956. https://doi.org/10.1126/sciadv.abm2956.Full Text
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Huang, T., Y. Chen, Z. Zeng, and L. Chua. “Editorial Special Issue for 50th Birthday of Memristor Theory and Application of Neuromorphic Computing Based on Memristor - Part II.” Ieee Transactions on Circuits and Systems I: Regular Papers 68, no. 12 (December 1, 2021): 4835–36. https://doi.org/10.1109/TCSI.2021.3124407.Full Text
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Huang, T., Y. Chen, Z. Zeng, and L. Chua. “Editorial Special Issue for 50th Birthday of Memristor Theory and Application of Neuromorphic Computing Based on Memristor - Part i.” Ieee Transactions on Circuits and Systems I: Regular Papers 68, no. 11 (November 1, 2021): 4417–18. https://doi.org/10.1109/TCSI.2021.3115842.Full Text
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Wen, S., W. Liu, Y. Yang, P. Zhou, Z. Guo, Z. Yan, Y. Chen, and T. Huang. “Multilabel Image Classification via Feature/Label Co-Projection.” Ieee Transactions on Systems, Man, and Cybernetics: Systems 51, no. 11 (November 1, 2021): 7250–59. https://doi.org/10.1109/TSMC.2020.2967071.Full Text
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Chen, Y., Q. Qiu, and Y. Lin. “Introduction to the Special Issue on Hardware and Algorithms for Efficient Machine Learning-Part 2.” Acm Journal on Emerging Technologies in Computing Systems 17, no. 4 (October 1, 2021). https://doi.org/10.1145/3464917.Full Text
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Mao, J., H. Yang, A. Li, H. Li, and Y. Chen. “TPrune: Efficient Transformer Pruning for Mobile Devices.” Acm Transactions on Cyber Physical Systems 5, no. 3 (July 1, 2021). https://doi.org/10.1145/3446640.Full Text
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Chai, X., X. Zhi, Z. Gan, Y. Zhang, Y. Chen, and J. Fu. “Combining improved genetic algorithm and matrix semi-tensor product (STP) in color image encryption.” Signal Processing 183 (June 1, 2021). https://doi.org/10.1016/j.sigpro.2021.108041.Full Text
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Wen, S., M. Dong, Y. Yang, P. Zhou, T. Huang, and Y. Chen. “End-to-End Detection-Segmentation System for Face Labeling.” Ieee Transactions on Emerging Topics in Computational Intelligence 5, no. 3 (June 1, 2021): 457–67. https://doi.org/10.1109/TETCI.2019.2947319.Full Text
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Chai, X., H. Wu, Z. Gan, D. Han, Y. Zhang, and Y. Chen. “An efficient approach for encrypting double color images into a visually meaningful cipher image using 2D compressive sensing.” Information Sciences 556 (May 1, 2021): 305–40. https://doi.org/10.1016/j.ins.2020.10.007.Full Text
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Rao, J., Z. Fan, L. Hong, S. Cheng, Q. Huang, J. Zhao, X. Xiang, et al. “An electroforming-free, analog interface-type memristor based on a SrFeOx epitaxial heterojunction for neuromorphic computing.” Materials Today Physics 18 (May 1, 2021). https://doi.org/10.1016/j.mtphys.2021.100392.Full Text
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Chen, Y., Q. Qiu, and Y. Lin. “Introduction of Special Issue on Hardware and Algorithms for Efficient Machine LearningΓÇôPart 1.” Acm Journal on Emerging Technologies in Computing Systems 17, no. 2 (April 5, 2021). https://doi.org/10.1145/3449045.Full Text
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Wang, C., D. Feng, W. Tong, J. Liu, B. Wu, W. Zhao, Y. Zhang, and Y. Chen. “Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage.” Ieee Transactions on Computers 70, no. 4 (April 1, 2021): 566–80. https://doi.org/10.1109/TC.2020.2990884.Full Text
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Wang, C., D. Feng, W. Tong, Y. Hua, J. Liu, B. Wu, W. Zhao, et al. “Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 40, no. 4 (April 1, 2021): 762–75. https://doi.org/10.1109/TCAD.2020.3006188.Full Text
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Sun, Bo, Yuting Cao, Zhenyuan Guo, Zheng Yan, Shiping Wen, Tingwen Huang, and Yiran Chen. “Sliding Mode Stabilization of Memristive Neural Networks With Leakage Delays and Control Disturbance.” Ieee Transactions on Neural Networks and Learning Systems 32, no. 3 (March 2021): 1254–63. https://doi.org/10.1109/tnnls.2020.2984000.Full Text
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Wen, S., H. Wei, Y. Yang, Z. Guo, Z. Zeng, T. Huang, and Y. Chen. “Memristive LSTM Network for Sentiment Analysis.” Ieee Transactions on Systems, Man, and Cybernetics: Systems 51, no. 3 (March 1, 2021): 1794–1804. https://doi.org/10.1109/TSMC.2019.2906098.Full Text
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Liang, F., Z. Tian, M. Dong, S. Cheng, L. Sun, H. Li, Y. Chen, and G. Zhang. “Efficient neural network using pointwise convolution kernels with linear phase constraint.” Neurocomputing 423 (January 29, 2021): 572–79. https://doi.org/10.1016/j.neucom.2020.10.067.Full Text
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Chen, Y. “2021: The Greatest Reset [From the Editor].” Ieee Circuits and Systems Magazine 21, no. 1 (January 1, 2021): 4. https://doi.org/10.1109/MCAS.2020.3046386.Full Text
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Inkawhich, N. A., E. K. Davis, M. J. Inkawhich, U. K. Majumder, and Y. Chen. “Training SAR-ATR Models for Reliable Operation in Open-World Environments.” Ieee Journal of Selected Topics in Applied Earth Observations and Remote Sensing 14 (January 1, 2021): 3954–66. https://doi.org/10.1109/JSTARS.2021.3068944.Full Text
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Inkawhich, N., M. J. Inkawhich, E. K. Davis, U. K. Majumder, E. Tripp, C. Capraro, and Y. Chen. “Bridging a Gap in SAR-ATR: Training on Fully Synthetic and Testing on Measured Data.” Ieee Journal of Selected Topics in Applied Earth Observations and Remote Sensing 14 (January 1, 2021): 2942–55. https://doi.org/10.1109/JSTARS.2021.3059991.Full Text
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Liu, X., M. Mao, X. Bi, H. Li, and Y. Chen. “Exploring Applications of STT-RAM in GPU Architectures.” Ieee Transactions on Circuits and Systems I: Regular Papers 68, no. 1 (January 1, 2021): 238–49. https://doi.org/10.1109/TCSI.2020.3031895.Full Text
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Pang, M., B. Wang, Y. M. Cheung, Y. Chen, and B. Wen. “VD-GAN: A Unified Framework for Joint Prototype and Representation Learning from Contaminated Single Sample per Person.” Ieee Transactions on Information Forensics and Security 16 (January 1, 2021): 2246–59. https://doi.org/10.1109/TIFS.2021.3050055.Full Text
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Zhang, Oliver, Cheng Ding, Tania Pereira, Ran Xiao, Kais Gadhoumi, Karl Meisel, Randall J. Lee, Yiran Chen, and Xiao Hu. “Explainability Metrics of Deep Convolutional Networks for Photoplethysmography Quality Assessment.” Ieee Access : Practical Innovations, Open Solutions 9 (January 2021): 29736–45. https://doi.org/10.1109/access.2021.3054613.Full Text
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Lan, Y., K. W. Nixon, Q. Guo, G. Zhang, Y. Xu, H. Li, and Y. Chen. “FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 12 (December 1, 2020): 4791–4804. https://doi.org/10.1109/TCAD.2020.2969982.Full Text
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Chai, X., J. Bi, Z. Gan, X. Liu, Y. Zhang, and Y. Chen. “Color image compression and encryption scheme based on compressive sensing and double random encryption strategy.” Signal Processing 176 (November 1, 2020). https://doi.org/10.1016/j.sigpro.2020.107684.Full Text
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Wang, S., Y. Cao, S. Wen, Z. Guo, T. Huang, and Y. Chen. “Projective Synchroniztion of Neural Networks via Continuous/Periodic Event-Based Sampling Algorithms.” Ieee Transactions on Network Science and Engineering 7, no. 4 (October 1, 2020): 2746–54. https://doi.org/10.1109/TNSE.2020.2985409.Full Text
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Yang, C., B. Liu, H. Li, Y. Chen, M. Barnell, Q. Wu, W. Wen, and J. Rajendran. “Thwarting Replication Attack against Memristor-Based Neuromorphic Computing System.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 10 (October 1, 2020): 2192–2205. https://doi.org/10.1109/TCAD.2019.2937817.Full Text
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Zhu, J., G. Sun, X. Zhang, C. Zhang, W. Zhang, Y. Liang, T. Wang, Y. Chen, and J. Di. “Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 10 (October 1, 2020): 2279–92. https://doi.org/10.1109/TCAD.2019.2948914.Full Text
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Feng, D., J. Xu, Y. Hua, W. Tong, J. Liu, C. Li, and Y. Chen. “A Low-Overhead Encoding Scheme to Extend the Lifetime of Nonvolatile Memories.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 10 (October 1, 2020): 2516–29. https://doi.org/10.1109/TCAD.2019.2962127.Full Text
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Chen, L., Z. He, C. Li, S. Wen, and Y. Chen. “Revisiting memristor properties.” International Journal of Bifurcation and Chaos 30, no. 12 (September 30, 2020). https://doi.org/10.1142/S0218127420501722.Full Text
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Gan, Z., X. Chai, J. Zhang, Y. Zhang, and Y. Chen. “An effective image compression–encryption scheme based on compressive sensing (CS) and game of life (GOL).” Neural Computing and Applications 32, no. 17 (September 1, 2020): 14113–41. https://doi.org/10.1007/s00521-020-04808-8.Full Text
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Chen, Y., D. Fan, Y. Wang, and S. Yamashita. “Editorial for the special issue on disruptive computing technologies.” Ccf Transactions on High Performance Computing 2, no. 3 (September 1, 2020): 209–10. https://doi.org/10.1007/s42514-020-00048-3.Full Text
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Xie, X., S. Wen, Z. Yan, T. Huang, and Y. Chen. “Designing pulse-coupled neural networks with spike-synchronization-dependent plasticity rule: image segmentation and memristor circuit application.” Neural Computing and Applications 32, no. 17 (September 1, 2020): 13441–52. https://doi.org/10.1007/s00521-020-04752-7.Full Text
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Guo, Q., J. Ye, Y. Chen, Y. Hu, Y. Lan, G. Zhang, and X. Li. “INOR—An Intelligent noise reduction method to defend against adversarial audio examples.” Neurocomputing 401 (August 11, 2020): 160–72. https://doi.org/10.1016/j.neucom.2020.02.110.Full Text
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Yan, Zheng, Jiadong Chen, Rui Hu, Tingwen Huang, Yiran Chen, and Shiping Wen. “Training memristor-based multilayer neuromorphic networks with SGD, momentum and adaptive learning rates.” Neural Networks : The Official Journal of the International Neural Network Society 128 (August 2020): 142–49. https://doi.org/10.1016/j.neunet.2020.04.025.Full Text
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Wen, S., H. Wei, Z. Yan, Z. Guo, Y. Yang, T. Huang, and Y. Chen. “Memristor-Based Design of Sparse Compact Convolutional Neural Network.” Ieee Transactions on Network Science and Engineering 7, no. 3 (July 1, 2020): 1431–40. https://doi.org/10.1109/TNSE.2019.2934357.Full Text
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Chai, X., H. Wu, Z. Gan, Y. Zhang, and Y. Chen. “Hiding cipher-images generated by 2-D compressive sensing with a multi-embedding strategy.” Signal Processing 171 (June 1, 2020). https://doi.org/10.1016/j.sigpro.2020.107525.Full Text
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Chai, X., X. Zheng, Z. Gan, and Y. Chen. “Exploiting plaintext-related mechanism for secure color image encryption.” Neural Computing and Applications 32, no. 12 (June 1, 2020): 8065–88. https://doi.org/10.1007/s00521-019-04312-8.Full Text
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Chai, X., X. Fu, Z. Gan, Y. Zhang, Y. Lu, and Y. Chen. “An efficient chaos-based image compression and encryption scheme using block compressive sensing and elementary cellular automata.” Neural Computing and Applications 32, no. 9 (May 1, 2020): 4961–88. https://doi.org/10.1007/s00521-018-3913-3.Full Text
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Wang, S., Y. Cao, T. Huang, Y. Chen, and S. Wen. “Event-triggered distributed control for synchronization of multiple memristive neural networks under cyber-physical attacks.” Information Sciences 518 (May 1, 2020): 361–75. https://doi.org/10.1016/j.ins.2020.01.022.Full Text
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Jia, X., J. Yang, P. Dai, R. Liu, Y. Chen, and W. Zhao. “SPINBIS: Spintronics-based Bayesian inference system with stochastic computing.” Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 4 (April 1, 2020): 789–802. https://doi.org/10.1109/TCAD.2019.2897631.Full Text
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Zhang, G., B. Li, J. Wu, R. Wang, Y. Lan, L. Sun, S. Lei, H. Li, and Y. Chen. “A low-cost and high-speed hardware implementation of spiking neural network.” Neurocomputing 382 (March 21, 2020): 106–15. https://doi.org/10.1016/j.neucom.2019.11.045.Full Text
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Li, H., X. Wang, Z. L. Ong, W. F. Wong, Y. Zhang, P. Wang, and Y. Chen. “Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement.” Ieee Transactions on Magnetics 47, no. 10 (January 1, 2011): 2356–59. https://doi.org/10.1109/TMAG.2011.2159262.Full Text
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Wang, P., X. Wang, Y. Zhang, H. Li, S. P. Levitan, and Y. Chen. “Nonpersistent errors optimization in spin-MOS logic and storage circuitry.” Ieee Transactions on Magnetics 47, no. 10 (January 1, 2011): 3860–63. https://doi.org/10.1109/TMAG.2011.2153838.Full Text
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Zhang, Y., X. Wang, H. Li, and Y. Chen. “STT-RAM cell optimization considering MTJ and CMOS variations.” Ieee Transactions on Magnetics 47, no. 10 (January 1, 2011): 2962–65. https://doi.org/10.1109/TMAG.2011.2158810.Full Text
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Chen, Y., X. Wang, H. Li, H. Xi, Y. Yan, and W. Zhu. “Design margin exploration of spin-transfer torque RAM (STT-RAM) in scaled technologies.” Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 12 (December 1, 2010): 1724–34. https://doi.org/10.1109/TVLSI.2009.2032192.Full Text
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Chen, Y., W. Tian, H. Li, X. Wang, and W. Zhu. “PCMO device with high switching stability.” Ieee Electron Device Letters 31, no. 8 (August 1, 2010): 866–68. https://doi.org/10.1109/LED.2010.2050457.Full Text
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Chen, Y., and H. Li. “Patents relevant to cross-point memory array.” Recent Patents on Electrical Engineering 3, no. 2 (June 25, 2010): 114–24. https://doi.org/10.2174/1874476111003020114.Full Text
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Xi, H., J. Stricklin, H. Li, Y. Chen, X. Wang, Y. Zheng, Z. Gao, and M. X. Tang. “Spin transfer torque memory with thermal assist mechanism: A case study.” Ieee Transactions on Magnetics 46, no. 3 PART 2 (March 1, 2010): 860–65. https://doi.org/10.1109/TMAG.2009.2033674.Full Text
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Chen, Y., H. Li, C. K. Koh, J. Li, K. Roy, G. Sun, and Y. Xie. “Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance.” Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 11 (January 1, 2010): 1621–24. https://doi.org/10.1109/TVLSI.2009.2026280.Full Text
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Wang, X., Y. Chen, Y. Gu, and H. Li. “Spintronic memristor temperature sensor.” Ieee Electron Device Letters 31, no. 1 (January 1, 2010): 20–22. https://doi.org/10.1109/LED.2009.2035643.Full Text
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Wang, X., and Y. Chen. “Patents relevant to spintronic memristor.” Recent Patents on Electrical Engineering 3, no. 1 (January 1, 2010): 10–18. https://doi.org/10.2174/1874476111003010010.Full Text
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Xu, W., T. Zhang, and Y. Chen. “Design of spin-torque transfer magnetoresistive RAM and CAM/TCAM with high sensing and search Speed.” Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 1 (January 1, 2010): 66–74. https://doi.org/10.1109/TVLSI.2008.2007735.Full Text
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Chen, Y., H. Li, K. Roy, and C. K. Koh. “Gated decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies.” Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 17, no. 12 (December 1, 2009): 1749–52. https://doi.org/10.1109/TVLSI.2008.2007843.Full Text
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Koh, C. K., W. F. Wong, Y. Chen, and H. Li. “Tolerating process variations in large, set-associative caches: The buddy cache.” Transactions on Architecture and Code Optimization 6, no. 2 (June 1, 2009). https://doi.org/10.1145/1543753.1543757.Full Text
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Xi, H., X. Wang, Y. Chen, and P. J. Ryan. “Ordering of magnetic nanoparticles in bilayer structures.” Journal of Physics D: Applied Physics 42, no. 1 (April 8, 2009). https://doi.org/10.1088/0022-3727/42/1/015006.Full Text
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Wang, X., Y. Chen, H. Xi, H. Li, and D. Dimitrov. “Spintronic memristor through spin-thorque-induced magnetization motion.” Ieee Electron Device Letters 30, no. 3 (February 12, 2009): 294–97. https://doi.org/10.1109/LED.2008.2012270.Full Text
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Wang, X., Y. Chen, H. Li, D. Dimitrov, and H. Liu. “Spin torque random access memory down to 22 nm technology.” Ieee Transactions on Magnetics 44, no. 11 PART 2 (January 1, 2008): 2479–82. https://doi.org/10.1109/TMAG.2008.2002386.Full Text
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Chen, Y., K. Roy, and C. K. Koh. “Current demand balancing: A technique for minimization of current surge in high performance clock-gated microprocessors.” Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 13, no. 1 (January 1, 2005): 75–85. https://doi.org/10.1109/TVLSI.2004.840404.Full Text
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Li, H., S. Bhunia, Y. Chen, K. Roy, and T. N. Vijaykumar. “DCG: Deterministic Clock-Gating for Low-Power Microprocessor Design.” Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 12, no. 3 (March 1, 2004): 245–54. https://doi.org/10.1109/TVLSI.2004.824307.Full Text
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Book Sections
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Xie, Z., J. Pan, C. C. Chang, R. Liang, E. C. Barboza, and Y. Chen. “Deep Learning for Routability.” In Machine Learning Applications in Electronic Design Automation, 35–61, 2023. https://doi.org/10.1007/978-3-031-13074-8_2.Full Text
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Li, A., H. Yang, and Y. Chen. “Task-Agnostic Privacy-Preserving Representation Learning via Federated Learning.” In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 12500 LNCS:51–65, 2020. https://doi.org/10.1007/978-3-030-63076-8_4.Full Text
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Hassan, A. M., C. Liu, C. Yang, H. Helen Li, and Y. Chen. “Designing neuromorphic computing systems with memristor devices.” In Handbook of Memristor Networks, 469–94, 2019. https://doi.org/10.1007/978-3-319-76375-0_16.Full Text
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Li, Z., C. Liu, H. Li, and Y. Chen. “Neuromorphic Hardware Acceleration Enabled by Emerging Technologies.” In Emerging Technology and Architecture for Big-Data Analytics. Springer, 2017.
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Chen, Y. C., Y. Wang, W. Zhang, Y. Chen, and H. H. Li. “In-place logic obfuscation for emerging nonvolatile FPGAs.” In Fundamentals of IP and SoC Security: Design, Verification, and Debug, 277–93, 2017. https://doi.org/10.1007/978-3-319-50057-7_11.Full Text
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Yang, C., H. Li, and Y. Chen. “Nanoscale memory architectures for neuromorphic computing.” In Security Opportunities in Nano Devices and Emerging Technologies, 215–34, 2017. https://doi.org/10.1201/9781315265056.Full Text
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Wang, P., E. Eken, W. Zhang, R. Joshi, R. Kanj, and Y. Chen. “A thermal and process variation aware MTJ switching model and its applications in soft error analysis.” In More than Moore Technologies for Next Generation Computer Design, 101–25, 2015. https://doi.org/10.1007/978-1-4939-2163-8_5.Full Text
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Wen, W., Y. Zhang, and Y. Chen. “Statistical reliability/energy characterization in STT-RAM cell designs.” In Spintronics-Based Computing, 201–30, 2015. https://doi.org/10.1007/978-3-319-15180-9_7.Full Text
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Chen, Y., J. Guo, and Z. Sun. “CPU-GPU system designs for high performance cloud computing.” In High Performance Cloud Auditing and Applications, 9781461432968:283–99, 2014. https://doi.org/10.1007/978-1-4614-3296-8_11.Full Text
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Zhang, Y., W. Wen, H. Li, and Y. Chen. “The Prospect of STT-RAM Scaling.” In Metallic Spintronic Devices. CRC Press, 2014.
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Chen, Y., H. Li, and Z. Sun. “Spintronic memristor as interface between DNA and solid state devices.” In Memristors and Memristive Systems, 9781461490685:281–98, 2014. https://doi.org/10.1007/978-1-4614-9068-5_9.Full Text
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Sun, G., X. Dong, Y. Chen, and Y. Xie. “An energy-efficient 3D stacked STT-RAM cache architecture for CMPs.” In Emerging Memory Technologies: Design, Architecture, and Applications, 9781441995513:145–67, 2014. https://doi.org/10.1007/978-1-4419-9551-3_6.Full Text
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Sun, G., Y. Joo, Y. Chen, and Y. Xie. “A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.” In Emerging Memory Technologies: Design, Architecture, and Applications, 9781441995513:51–77, 2014. https://doi.org/10.1007/978-1-4419-9551-3_3.Full Text
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Zhang, Y., W. Wen, and Y. Chen. “Asymmetry in STT-RAM cell operations.” In Emerging Memory Technologies: Design, Architecture, and Applications, 9781441995513:117–44, 2011. https://doi.org/10.1007/978-1-4419-9551-3_5.Full Text
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Wang, X., Y. Chen, and T. Zhang. “Magnetization Switching in Spin Torque Random Access Memory: Challenges and Opportunities.” In Analog Circuits and Signal Processing, 253–94, 2010. https://doi.org/10.1007/978-90-481-9216-8_9.Full Text
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Conference Papers
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Zhang, T., D. Cheng, Y. He, Z. Chen, X. Dai, L. Xiong, F. Yan, H. Li, Y. Chen, and W. Wen. “NASRec: Weight Sharing Neural Architecture Search for Recommender Systems.” In Acm Web Conference 2023 Proceedings of the World Wide Web Conference, Www 2023, 1199–1207, 2023. https://doi.org/10.1145/3543507.3583446.Full Text
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Hanson, E., M. Horton, H. H. Li, and Y. Chen. “DefT: Boosting Scalability of Deformable Convolution Operations on GPUs.” In International Conference on Architectural Support for Programming Languages and Operating Systems Asplos, 3:134–46, 2023. https://doi.org/10.1145/3582016.3582017.Full Text
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Chang, C. C., J. Pan, Z. Xie, J. Hu, and Y. Chen. “Rethink before Releasing Your Model: ML Model Extraction Attack in EDA.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 252–57, 2023. https://doi.org/10.1145/3566097.3567896.Full Text
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Chang, C. C., J. Pan, Z. Xie, Y. Li, Y. Lin, J. Hu, and Y. Chen. “Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 58–63, 2023. https://doi.org/10.1145/3566097.3567881.Full Text
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Yang, X., S. Li, Q. Zheng, and Y. Chen. “Improving the Robustness and Efficiency of PIM-Based Architecture by SW/HW Co-Design.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 618–23, 2023. https://doi.org/10.1145/3566097.3568358.Full Text
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Zhang, T., M. Ma, F. Yan, H. Li, and Y. Chen. “: Joint Point Interaction-Dimension Search for 3D Point Cloud.” In Proceedings 2023 Ieee Winter Conference on Applications of Computer Vision, Wacv 2023, 1298–1307, 2023. https://doi.org/10.1109/WACV56688.2023.00135.Full Text
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Du, Z., J. Sun, A. Li, P. Y. Chen, J. Zhang, H. Li, and Y. Chen. “Rethinking normalization methods in federated learning.” In Distributedml 2022 Proceedings of the 3rd International Workshop on Distributed Machine Learning, Part of Conext 2022, 16–22, 2022. https://doi.org/10.1145/3565010.3569062.Full Text
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Chen, X., D. Li, Y. Chen, and J. Xiong. “Boosting the sensing granularity of acoustic signals by exploiting hardware non-linearity.” In Hotnets 2022 Proceedings of the 2022 21st Acm Workshop on Hot Topics in Networks, 53–59, 2022. https://doi.org/10.1145/3563766.3564091.Full Text
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Sun, J., A. Li, L. Duan, S. Alam, X. Deng, X. Guo, H. Wang, et al. “FedSEA: A Semi-Asynchronous Federated Learning Framework for Extremely Heterogeneous Devices.” In Sensys 2022 Proceedings of the 20th Acm Conference on Embedded Networked Sensor Systems, 106–19, 2022. https://doi.org/10.1145/3560905.3568538.Full Text
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Pan, J., C. C. Chang, Z. Xie, J. Hu, and Y. Chen. “Robustify ML-based lithography hotspot detectors.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 2022. https://doi.org/10.1145/3508352.3549389.Full Text
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Sengupta, P., A. Tyagi, Y. Chen, and J. Hu. “How good is your verilog RTL code? A quick answer from machine learning.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 2022. https://doi.org/10.1145/3508352.3549375.Full Text
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Xie, Z., S. Li, M. Ma, C. C. Chang, J. Pan, Y. Chen, and J. Hu. “DEEP: Developing extremely efficient runtime on-chip power meters.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 2022. https://doi.org/10.1145/3508352.3549427.Full Text
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Zhang, J., J. Tang, Y. Chen, J. Liu, J. Ye, M. Wolf, V. Narayanan, M. Srivastava, M. I. Jordan, and V. Bahl. “The 5th Artificial Intelligence of Things (AIoT) Workshop.” In Proceedings of the Acm Sigkdd International Conference on Knowledge Discovery and Data Mining, 4912–13, 2022. https://doi.org/10.1145/3534678.3542911.Full Text
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Li, Z., Q. Zheng, B. Yan, R. Huang, B. Li, and Y. Chen. “ASTERS: Adaptable Threshold Spike-timing Neuromorphic Design with Twin-Column ReRAM Synapses.” In Proceedings Design Automation Conference, 1099–1104, 2022. https://doi.org/10.1145/3489517.3530591.Full Text
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Pan, J., C. C. Chang, Z. Xie, A. Li, M. Tang, T. Zhang, J. Hu, and Y. Chen. “Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data.” In Proceedings Design Automation Conference, 961–66, 2022. https://doi.org/10.1145/3489517.3530578.Full Text
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Yang, H., X. Yang, N. Z. Gong, and Y. Chen. “HERO: Hessian-Enhanced Robust Optimization for Unifying and Improving Generalization and Quantization Performance.” In Proceedings Design Automation Conference, 25–30, 2022. https://doi.org/10.1145/3489517.3530678.Full Text
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Hanson, E., S. Li, H. H. Li, and Y. Chen. “Cascading Structured Pruning: Enabling High Data Reuse for Sparse DNN Accelerators.” In Proceedings International Symposium on Computer Architecture, 522–35, 2022. https://doi.org/10.1145/3470496.3527419.Full Text
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Chen, Y., and S. Reda. “ISLPED 2021: The 25th Anniversary!.” In Ieee Design and Test, 39:92–93, 2022. https://doi.org/10.1109/MDAT.2021.3128437.Full Text
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Fan, H., B. Wang, P. Zhou, A. Li, Z. Xu, C. Fu, H. Li, and Y. Chen. “Reinforcement Learning-based Black-Box Evasion Attacks to Link Prediction in Dynamic Graphs.” In 2021 Ieee 23rd International Conference on High Performance Computing and Communications, 7th International Conference on Data Science and Systems, 19th International Conference on Smart City and 7th International Conference on Dependability in Sensor, Cloud and Big Data Systems and Applications, Hpcc Dss Smartcity Dependsys 2021, 933–40, 2022. https://doi.org/10.1109/HPCC-DSS-SmartCity-DependSys53884.2021.00149.Full Text
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Gao, Z., A. Li, D. Li, J. Liu, J. Xiong, Y. Wang, B. Li, and Y. Chen. “MOM: Microphone based 3D Orientation Measurement.” In Proceedings 21st Acm/Ieee International Conference on Information Processing in Sensor Networks, Ipsn 2022, 132–44, 2022. https://doi.org/10.1109/IPSN54338.2022.00018.Full Text
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Gao, Z., M. Tang, A. Li, and Y. Chen. “An Audio Frequency Unfolding Framework for Ultra-Low Sampling Rate Sensors.” In Proceedings International Symposium on Quality Electronic Design, Isqed, Vol. 2022-April, 2022. https://doi.org/10.1109/ISQED54688.2022.9806149.Full Text
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Inkawhich, M., N. Inkawhich, E. Davis, H. Li, and Y. Chen. “The Untapped Potential of Off-the-Shelf Convolutional Neural Networks.” In Proceedings 2022 Ieee/Cvf Winter Conference on Applications of Computer Vision, Wacv 2022, 2907–16, 2022. https://doi.org/10.1109/WACV51458.2022.00296.Full Text
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Li, B., H. Lv, Y. Wang, and Y. Chen. “Security Threat to the Robustness of RRAM-based Neuromorphic Computing System.” In Proceedings 2022 Ieee International Symposium on Smart Electronic Systems, Ises 2022, 267–71, 2022. https://doi.org/10.1109/iSES54909.2022.00061.Full Text
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Lin, X., J. Pan, J. Xu, Y. Chen, and C. Zhuo. “Lithography Hotspot Detection via Heterogeneous Federated Learning with Local Adaptation.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 2022-January:166–71, 2022. https://doi.org/10.1109/ASP-DAC52403.2022.9712491.Full Text
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Tang, M., X. Ning, Y. Wang, J. Sun, H. Li, and Y. Chen. “FedCor: Correlation-Based Active Client Selection Strategy for Heterogeneous Federated Learning.” In Proceedings of the Ieee Computer Society Conference on Computer Vision and Pattern Recognition, 2022-June:10092–101, 2022. https://doi.org/10.1109/CVPR52688.2022.00986.Full Text
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Yan, B., J. L. Hsu, P. C. Yu, C. C. Lee, Y. Zhang, W. Yue, G. Mei, et al. “A 1.041-Mb/mm227.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications.” In Digest of Technical Papers Ieee International Solid State Circuits Conference, 2022-February:188–90, 2022. https://doi.org/10.1109/ISSCC42614.2022.9731545.Full Text
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Yang, X., H. Yang, J. Zhang, H. H. Li, and Y. Chen. “On Building Efficient and Robust Neural Network Designs.” In Conference Record Asilomar Conference on Signals, Systems and Computers, 2022-October:317–21, 2022. https://doi.org/10.1109/IEEECONF56349.2022.10051891.Full Text
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Zhang, J., Y. Chen, and H. Li. “Privacy Leakage of Adversarial Training Models in Federated Learning Systems.” In Ieee Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2022-June:107–13, 2022. https://doi.org/10.1109/CVPRW56347.2022.00021.Full Text
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Zhang, J., Y. Chen, and J. Chen. “Join-Chain Network: A Logical Reasoning View of the Multi-head Attention in Transformer.” In Ieee International Conference on Data Mining Workshops, Icdmw, 2022-November:947–57, 2022. https://doi.org/10.1109/ICDMW58026.2022.00123.Full Text
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Zhang, J., Z. Du, J. Sun, A. Li, M. Tang, Y. Wu, Z. Gao, M. Kuo, H. H. Li, and Y. Chen. “Next Generation Federated Learning for Edge Devices: An Overview.” In Proceedings 2022 Ieee 8th International Conference on Collaboration and Internet Computing, Cic 2022, 10–15, 2022. https://doi.org/10.1109/CIC56439.2022.00012.Full Text
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Li, A., J. Sun, X. Zeng, M. Zhang, H. Li, and Y. Chen. “FedMask: Joint Computation and Communication-Efficient Personalized Federated Learning via Heterogeneous Masking.” In Sensys 2021 Proceedings of the 2021 19th Acm Conference on Embedded Networked Sensor Systems, 42–55, 2021. https://doi.org/10.1145/3485730.3485929.Full Text
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Li, S., E. Hanson, X. Qian, H. H. Li, and Y. Chen. “ESCALATE: Boosting the efficiency of sparse CNN accelerator with kernel decomposition.” In Proceedings of the Annual International Symposium on Microarchitecture, Micro, 992–1004, 2021. https://doi.org/10.1145/3466752.3480043.Full Text
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Xie, Z., X. Xu, M. Walker, J. Knebel, K. Palaniswamy, N. Hebert, J. Hu, H. Yang, Y. Chen, and S. Das. “APOLLO: An automated power modeling framework for runtime power introspection in high-volume commercial microprocessors.” In Proceedings of the Annual International Symposium on Microarchitecture, Micro, 1–14, 2021. https://doi.org/10.1145/3466752.3480064.Full Text
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Wang, B., J. Guo, A. Li, Y. Chen, and H. Li. “Privacy-Preserving Representation Learning on Graphs: A Mutual Information Perspective.” In Proceedings of the Acm Sigkdd International Conference on Knowledge Discovery and Data Mining, 1667–76, 2021. https://doi.org/10.1145/3447548.3467273.Full Text
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Yang, C., L. Ding, Y. Chen, and H. Li. “Defending against GAN-based DeepFake Attacks via Transformation-aware Adversarial Faces.” In Proceedings of the International Joint Conference on Neural Networks, Vol. 2021-July, 2021. https://doi.org/10.1109/IJCNN52387.2021.9533868.Full Text
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Li, A., J. Guo, H. Yang, F. D. Salim, and Y. Chen. “DeepObfuscator: Obfuscating Intermediate Representations with Privacy-Preserving Adversarial Learning on Smartphones.” In Iotdi 2021 Proceedings of the 2021 International Conference on Internet of Things Design and Implementation, 28–39, 2021. https://doi.org/10.1145/3450268.3453519.Full Text
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Wu, C., X. Yang, H. Yu, I. Takeuchi, Y. Chen, and M. Li. “Optical Generative Adversarial Network based on Programmable Phase-change Photonics.” In 2021 Conference on Lasers and Electro Optics, Cleo 2021 Proceedings, 2021.
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Chen, F., L. Song, H. H. Li, and Y. Chen. “RAISE: A Resistive Accelerator for Subject-Independent EEG Signal Classification.” In Proceedings Design, Automation and Test in Europe, Date, 2021-February:340–43, 2021. https://doi.org/10.23919/DATE51398.2021.9473993.Full Text
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Chen, F., L. Song, H. Li, and Y. Chen. “Marvel: A Vertical Resistive Accelerator for Low-Power Deep Learning Inference in Monolithic 3D.” In Proceedings Design, Automation and Test in Europe, Date, 2021-February:1240–45, 2021. https://doi.org/10.23919/DATE51398.2021.9474208.Full Text
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Xie, Z., R. Liang, X. Xu, J. Hu, Y. Duan, and Y. Chen. “Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 671–77, 2021. https://doi.org/10.1145/3394885.3431562.Full Text
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Chang, C. C., J. Pan, T. Zhang, Z. Xie, J. Hu, W. Qi, C. W. Lin, et al. “Automatic Routability Predictor Development Using Neural Architecture Search.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, Vol. 2021-November, 2021. https://doi.org/10.1109/ICCAD51958.2021.9643483.Full Text
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Chen, Y., A. Li, H. Yang, T. Zhang, Y. Yang, H. Li, S. Banerjee, and M. Pajic. “AI-Powered IoT System at the Edge.” In Proceedings 2021 Ieee 3rd International Conference on Cognitive Machine Intelligence, Cogmi 2021, 242–51, 2021. https://doi.org/10.1109/CogMI52975.2021.00039.Full Text
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Cheng, H. P., T. Zhang, Y. Zhang, S. Li, F. Liang, F. Yan, M. Li, V. Chandra, H. Li, and Y. Chen. “NASGEM: Neural Architecture Search via Graph Embedding Method.” In 35th Aaai Conference on Artificial Intelligence, Aaai 2021, 8B:7090–98, 2021.
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Gao, Z., A. Li, Y. Gao, B. Li, Y. Wang, and Y. Chen. “FedSwap: A Federated Learning based 5G Decentralized Dynamic Spectrum Access System.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, Vol. 2021-November, 2021. https://doi.org/10.1109/ICCAD51958.2021.9643496.Full Text
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Gao, Z., A. Li, Y. Gao, Y. Wang, and Y. Chen. “Hermes: Decentralized dynamic spectrum access system for massive devices deployment in 5g.” In International Conference on Embedded Wireless Systems and Networks, 2021.
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Inkawhich, N., K. J. Liang, J. Zhang, H. Yang, H. Li, and Y. Chen. “Can Targeted Adversarial Examples Transfer When the Source and Target Models Have No Label Space Overlap?” In Proceedings of the Ieee International Conference on Computer Vision, 2021-October:41–50, 2021. https://doi.org/10.1109/ICCVW54120.2021.00011.Full Text
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Li, A., J. Sun, B. Wang, L. Duan, S. Li, Y. Chen, and H. Li. “LotteryFL: Empower Edge Intelligence with Personalized and Communication-Efficient Federated Learning.” In 6th Acm/Ieee Symposium on Edge Computing, Sec 2021, 68–79, 2021. https://doi.org/10.1145/3453142.3492909.Full Text
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Pang, M., B. Wang, M. Ye, Y. Chen, and B. Wen. “DISENTANGLING PROTOTYPE AND VARIATION FOR SINGLE SAMPLE FACE RECOGNITION.” In Proceedings Ieee International Conference on Multimedia and Expo, 2021. https://doi.org/10.1109/ICME51207.2021.9428431.Full Text
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Sun, J., A. Li, B. Wang, H. Yang, H. Li, and Y. Chen. “Soteria: Provable Defense against Privacy Leakage in Federated Learning from Representation Perspective.” In Proceedings of the Ieee Computer Society Conference on Computer Vision and Pattern Recognition, 9307–15, 2021. https://doi.org/10.1109/CVPR46437.2021.00919.Full Text
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Sun, J., A. Li, L. DiValentin, A. Hassanzadeh, Y. Chen, and H. Li. “FL-WBC: Enhancing Robustness against Model Poisoning Attacks in Federated Learning from a Client Perspective.” In Advances in Neural Information Processing Systems, 15:12613–24, 2021.
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Wang, Y., Z. Zhu, F. Chen, M. Ma, G. Dai, H. Li, and Y. Chen. “REREC: In-ReRAM Acceleration with Access-Aware Mapping for Personalized Recommendation.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, Vol. 2021-November, 2021. https://doi.org/10.1109/ICCAD51958.2021.9643573.Full Text
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Wu, C., X. Yang, H. Yu, I. Takeuchi, Y. Chen, and M. Li. “Optical generative adversarial network based on programmable phase-change photonics.” In Optics Infobase Conference Papers, 2021.
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Yang, H., L. Duan, Y. Chen, and H. Li. “BSQ: EXPLORING BIT-LEVEL SPARSITY FOR MIXED-PRECISION NEURAL NETWORK QUANTIZATION.” In Iclr 2021 9th International Conference on Learning Representations, 2021.
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Li, B., Y. Wang, Y. Weng, Y. Chen, and H. Yang. “Training itself: Mixed-signal training acceleration for memristor-based neural network.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 361–66, 2014. https://doi.org/10.1109/ASPDAC.2014.6742916.Full Text
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Liu, X., Y. Li, Y. Zhang, A. K. Jones, and Y. Chen. “STD-TLB: A STT-RAM-based dynamically-configurable translation lookaside buffer for GPU architectures.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 355–60, 2014. https://doi.org/10.1109/ASPDAC.2014.6742915.Full Text
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Mao, M., G. Sun, Y. Li, A. K. Jones, and Y. Chen. “Prefetching techniques for STT-RAM based last-level cache in CMP systems.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 67–72, 2014. https://doi.org/10.1109/ASPDAC.2014.6742868.Full Text
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Liu, X., M. Mao, H. Li, Y. Chen, H. Jiang, J. J. Yang, Q. Wu, and M. Barnell. “A heterogeneous computing system with memristor-based neuromorphic accelerators.” In 2014 Ieee High Performance Extreme Computing Conference, Hpec 2014, 2014. https://doi.org/10.1109/HPEC.2014.7040986.Full Text
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Chen, X., K. W. Nixon, H. Zhou, Y. Liu, and Y. Chen. “FingerShadow: An OLED power optimization based on smartphone touch interactions.” In 6th Workshop on Power Aware Computing and Systems, Hotpower 2014, 2014.
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Chen, X., Y. Chen, M. Dong, and C. Zhang. “Demystifying energy usage in smartphones.” In Proceedings Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2596676.Full Text
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Eken, E., Y. Zhang, W. Wen, R. Joshi, H. Li, and Y. Chen. “A new field-assisted access scheme of STT-RAM with self-reference capability.” In Proceedings Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2593075.Full Text
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Li, B., Y. Wang, Y. Chen, H. H. Li, and H. Yang. “ICE: Inline calibration for memristor crossbar-based computing engine.” In Proceedings Design, Automation and Test in Europe, Date, 2014. https://doi.org/10.7873/DATE2014.197.Full Text
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Li, X., S. Duan, L. Wang, T. Huang, and Y. Chen. “Memristive radial basis function neural network for parameters adjustment of PID controller.” In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 8866:150–58, 2014. https://doi.org/10.1007/978-3-319-12436-0_17.Full Text
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Mao, M., W. Wen, Y. Zhang, Y. Chen, and H. Li. “Exploration of GPGPU register file architecture using domain-wall-shift- write based racetrack memory.” In Proceedings Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2593137.Full Text
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Nixon, K. W., X. Chen, H. Zhou, Y. Liu, and Y. Chen. “Mobile GPU power consumption reduction via dynamic resolution and frame rate scaling.” In 6th Workshop on Power Aware Computing and Systems, Hotpower 2014, 2014.
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Sun, M., L. E. Burke, Z. H. Mao, Y. Chen, H. C. Chen, Y. Bai, Y. Li, C. Li, and W. Jia. “Ebutton: A wearable computer for health monitoring and personal assistance.” In Proceedings Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2596678.Full Text
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Wang, D., J. Guo, K. Bu, and Y. Chen. “Reduction of data prevention cost and improvement of reliability in MLC NAND flash storage system.” In 2014 International Conference on Computing, Networking and Communications, Icnc 2014, 259–63, 2014. https://doi.org/10.1109/ICCNC.2014.6785342.Full Text
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Wang, Y., B. Li, R. Luo, Y. Chen, N. Xu, and H. Yang. “Energy efficient neural networks for big data analytics.” In Proceedings Design, Automation and Test in Europe, Date, 2014. https://doi.org/10.7873/DATE2014.358.Full Text
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Wen, W., Y. Zhang, M. Mao, and Y. Chen. “STT-RAM reliability enhancement through ECC and access scheme optimization.” In Proceedings of the International Symposium on Consumer Electronics, Isce, 2014. https://doi.org/10.1109/ISCE.2014.6884324.Full Text
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Wen, W., Y. Zhang, M. Mao, and Y. Chen. “State-restrict MLC stt-ram designs for high-reliable high-performance memory system.” In Proceedings Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2593220.Full Text
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Wu, Q., B. Liu, Y. Chen, H. Li, Q. Chen, and Q. Qiu. “Bio-inspired computing with resistive memories - Models, architectures and applications.” In Proceedings Ieee International Symposium on Circuits and Systems, 834–37, 2014. https://doi.org/10.1109/ISCAS.2014.6865265.Full Text
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Zhang, C., G. Sun, P. Li, T. Wang, D. Niu, and Y. Chen. “SBAC: A statistics based cache bypassing method for asymmetric-access caches.” In Proceedings of the International Symposium on Low Power Electronics and Design, 345–50, 2014. https://doi.org/10.1145/2627369.2627611.Full Text
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Li, B., Y. Shan, M. Hu, Y. Wang, Y. Chen, and H. Yang. “Memristor-based approximated computation.” In Proceedings of the International Symposium on Low Power Electronics and Design, 242–47, 2013. https://doi.org/10.1109/ISLPED.2013.6629302.Full Text
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Jones, A. K., Y. Chen, W. O. Collinge, H. Xu, L. A. Schaefer, A. E. Landis, and M. M. Bilec. “Considering fabrication in sustainable computing.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 206–10, 2013. https://doi.org/10.1109/ICCAD.2013.6691120.Full Text
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Wen, W., M. Mao, X. Zhu, S. H. Kang, D. Wang, and Y. Chen. “CD-ECC: Content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 1–8, 2013. https://doi.org/10.1109/ICCAD.2013.6691090.Full Text
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Zhang, Y., I. Bayram, Y. Wang, H. Li, and Y. Chen. “ADAMS: Asymmetric differential STT-RAM cell structure for reliable and high-performance applications.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 9–16, 2013. https://doi.org/10.1109/ICCAD.2013.6691091.Full Text
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Hu, M., H. Li, Y. Chen, Q. Wu, and G. S. Rose. “BSB training scheme implementation on memristor-based circuit.” In Proceedings of the 2013 Ieee Symposium on Computational Intelligence for Security and Defense Applications, Cisda 2013 2013 Ieee Symposium Series on Computational Intelligence, Ssci 2013, 80–87, 2013. https://doi.org/10.1109/CISDA.2013.6595431.Full Text
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Zhang, Y., L. Zhang, and Y. Chen. “MLC STT-RAM design considering probabilistic and asymmetric MTJ switching.” In Proceedings Ieee International Symposium on Circuits and Systems, 113–16, 2013. https://doi.org/10.1109/ISCAS.2013.6571795.Full Text
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Mao, M., H. Li, A. K. Jones, and Y. Chen. “Coordinating prefetching and STT-RAM based last-level cache management for multicore systems.” In Proceedings of the Acm Great Lakes Symposium on Vlsi, Glsvlsi, 55–60, 2013. https://doi.org/10.1145/2483028.2483060.Full Text
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Li, Q., J. Li, L. Shi, C. J. Xue, Y. Chen, and Y. He. “Compiler-assisted refresh minimization for volatile STT-RAM cache.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 273–78, 2013. https://doi.org/10.1109/ASPDAC.2013.6509608.Full Text
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Nixon, K. W., X. Chen, Z. H. Mao, Y. Chen, and K. Li. “Mobile user classification and authorization based on gesture usage recognition.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 384–89, 2013. https://doi.org/10.1109/ASPDAC.2013.6509626.Full Text
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Wen, W., Y. Zhang, L. Zhang, and Y. Chen. “Loadsa: A yield-driven top-down design method for STT-RAM array.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 291–96, 2013. https://doi.org/10.1109/ASPDAC.2013.6509611.Full Text
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Chen, X., Y. Chen, Z. Ma, and F. C. A. Fernandes. “How is energy consumed in smartphone display applications?” In Acm Hotmobile 2013: The 14th Workshop on Mobile Computing Systems and Applications, 2013. https://doi.org/10.1145/2444776.2444781.Full Text
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Guo, J., J. Yang, Y. Zhang, and Y. Chen. “Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer.” In Proceedings Design, Automation and Test in Europe, Date, 859–64, 2013. https://doi.org/10.7873/date.2013.181.Full Text
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Guo, J., W. Wen, Y. Z. Li, S. Li, H. Li, and Y. Chen. “DA-RAID-5: A disturb aware data protection technique for NAND flash storage systems.” In Proceedings Design, Automation and Test in Europe, Date, 380–85, 2013. https://doi.org/10.7873/date.2013.087.Full Text
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Li, J., L. Shi, Q. Li, C. J. Xue, Y. Chen, and Y. Xu. “Cache coherence enabled adaptive refresh for volatile STT-RAM.” In Proceedings Design, Automation and Test in Europe, Date, 1247–50, 2013. https://doi.org/10.7873/date.2013.258.Full Text
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Liu, B., M. Hu, H. Li, Z. H. Mao, Y. Chen, T. Huang, and W. Zhang. “Digital-assisted noise-eliminating training for memristor crossbar-based analog neuromorphic computing engine.” In Proceedings Design Automation Conference, 2013. https://doi.org/10.1145/2463209.2488741.Full Text
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Zhao, M., H. Zhang, X. Chen, Y. Chen, and C. J. Xue. “Online OLED dynamic voltage scaling for video streaming applications on mobile devices.” In 2013 International Conference on Hardware/Software Codesign and System Synthesis, Codes+Isss 2013, 2013. https://doi.org/10.1109/CODES-ISSS.2013.6658996.Full Text
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Chen, Y., X. Chen, M. Zhao, and C. J. Xue. “Mobile devices user-The subscriber and also the publisher of real-time OLED display power management plan.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 687–90, 2012.
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Zhang, Y., L. Zhang, W. Wen, G. Sun, and Y. Chen. “Multi-level cell STT-RAM: Is it realistic or just a dream?” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 526–32, 2012.
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Liu, B., Y. Chen, B. Wysocki, and T. Huang. “The circuit realization of a neuromorphic computing system with memristor-based synapse design.” In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 7663 LNCS:357–65, 2012. https://doi.org/10.1007/978-3-642-34475-6_43.Full Text
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Shao, Z., Y. Liu, Y. Chen, and T. Li. “Utilizing PCM for energy optimization in embedded systems.” In Proceedings 2012 Ieee Computer Society Annual Symposium on Vlsi, Isvlsi 2012, 398–403, 2012. https://doi.org/10.1109/ISVLSI.2012.81.Full Text
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Li, Y., Y. Chen, and A. K. Jones. “A software approach for combating asymmetries of non-volatile memories.” In Proceedings of the International Symposium on Low Power Electronics and Design, 191–96, 2012. https://doi.org/10.1145/2333660.2333708.Full Text
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Sun, G., Y. Zhang, Y. Wang, and Y. Chen. “Improving energy efficiency of write-asymmetric memories by log style write.” In Proceedings of the International Symposium on Low Power Electronics and Design, 173–78, 2012. https://doi.org/10.1145/2333660.2333705.Full Text
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Hu, M., H. Li, Q. Wu, G. S. Rose, and Y. Chen. “Memristor crossbar based hardware realization of BSB recall function.” In Proceedings of the International Joint Conference on Neural Networks, 2012. https://doi.org/10.1109/IJCNN.2012.6252563.Full Text
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Chen, X., J. Zheng, Y. Chen, M. Zhao, and C. J. Xue. “Quality-retaining OLED dynamic voltage scaling for video streaming applications on mobile devices.” In Proceedings Design Automation Conference, 1000–1005, 2012. https://doi.org/10.1145/2228360.2228540.Full Text
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Pino, R. E., H. Li, Y. Chen, M. Hu, and B. Liu. “Statistical memristor modeling and case study in neuromorphic computing.” In Proceedings Design Automation Conference, 585–90, 2012. https://doi.org/10.1145/2228360.2228466.Full Text
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Wen, W., Y. Zhang, Y. Chen, Y. Wang, and Y. Xie. “PS3-RAM: A fast portable and scalable statistical STT-RAM reliability analysis method.” In Proceedings Design Automation Conference, 1191–96, 2012. https://doi.org/10.1145/2228360.2228580.Full Text
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Bi, X., C. Zhang, H. Li, Y. Chen, and R. E. Pino. “Spintronic memristor based temperature sensor design with CMOS current reference.” In Proceedings Design, Automation and Test in Europe, Date, 1301–6, 2012.
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Zhang, Y., X. Wang, Y. Li, A. K. Jones, and Y. Chen. “Asymmetry of MTJ switching and its implication to STT-RAM designs.” In Proceedings Design, Automation and Test in Europe, Date, 1313–18, 2012.
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Zhao, B., J. Yang, Y. Zhang, Y. Chen, and H. Li. “Architecting a common-source-line array for bipolar non-volatile memory devices.” In Proceedings Design, Automation and Test in Europe, Date, 1451–54, 2012.
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Chen, X., J. Zeng, Y. Chen, W. Zhang, and H. Li. “Fine-grained dynamic voltage scaling on OLED display.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 807–12, 2012. https://doi.org/10.1109/ASPDAC.2012.6165066.Full Text
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Chen, Y., Y. Zhang, and P. Wang. “Probabilistic design in spintronic memory and logic circuit.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 323–28, 2012. https://doi.org/10.1109/ASPDAC.2012.6164967.Full Text
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Chen, X., B. Liu, Y. Chen, M. Zhao, C. J. Xue, and X. Guo. “Active compensation technique for the thin-film transistor variations and OLED aging of mobile device displays.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 516–22, 2012. https://doi.org/10.1145/2429384.2429493.Full Text
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Wang, P., W. Zhang, R. Joshi, R. Kanj, and Y. Chen. “A thermal and process variation aware MTJ switching model and its applications in soft error analysis.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 720–27, 2012. https://doi.org/10.1145/2429384.2429541.Full Text
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Zhang, Y., X. Wang, and Y. Chen. “STT-RAM cell design optimization for persistent and non-persistent error rate reduction: A statistical design view.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 471–77, 2011. https://doi.org/10.1109/ICCAD.2011.6105370.Full Text
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Zhou, P., B. Zhao, Y. Zhang, J. Yang, and Y. Chen. “MRAC: A memristor-based reconfigurable framework for adaptive cache replacement.” In Parallel Architectures and Compilation Techniques Conference Proceedings, Pact, 207–8, 2011. https://doi.org/10.1109/PACT.2011.29.Full Text
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Xue, C. J., Y. Zhang, Y. Chen, G. Sun, J. J. Yang, and H. Li. “Emerging non-volatile memories: Opportunities and challenges.” In Embedded Systems Week 2011, Esweek 2011 Proceedings of the 9th Ieee/Acm/Ifip International Conference on Hardware/Software Codesign and System Synthesis, Codes+Isss’11, 325–34, 2011. https://doi.org/10.1145/2039370.2039420.Full Text
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Wang, P., X. Chen, Y. Chen, H. Li, S. Kang, X. Zhu, and W. Wu. “A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis.” In Proceedings of the Custom Integrated Circuits Conference, 2011. https://doi.org/10.1109/CICC.2011.6055392.Full Text
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Chen, Y., W. F. Wong, H. Li, and C. K. Koh. “Processor caches built using multi-level spin-transfer torque RAM cells.” In Proceedings of the International Symposium on Low Power Electronics and Design, 73–78, 2011. https://doi.org/10.1109/ISLPED.2011.5993610.Full Text
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Chen, Y. C., H. Li, Y. Chen, and R. E. Pino. “3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers.” In Proceedings Design, Automation and Test in Europe, Date, 583–86, 2011.
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Chen, Y., and H. Li. “Emerging sensing techniques for emerging memories.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 204–10, 2011. https://doi.org/10.1109/ASPDAC.2011.5722185.Full Text
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Hu, M., H. Li, Y. Chen, X. Wang, and R. E. Pino. “Geometry variations analysis of TiO2 thin-film and spintronic memristors.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 25–30, 2011. https://doi.org/10.1109/ASPDAC.2011.5722193.Full Text
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Chen, Y., H. Li, X. Wang, and J. Park. “Applications of TMR devices in solid state circuits and systems.” In 2010 International Soc Design Conference, Isocc 2010, 252–55, 2010. https://doi.org/10.1109/SOCDC.2010.5682923.Full Text
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Chen, Y., H. Li, and X. Wang. “Spintronic devices: From memory to memristor.” In 2010 International Conference on Communications, Circuits and Systems, Icccas 2010 Proceedings, 811–16, 2010. https://doi.org/10.1109/ICCCAS.2010.5581868.Full Text
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Chen, Y., H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang. “Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM.” In Proceedings of the International Symposium on Low Power Electronics and Design, 1–6, 2010. https://doi.org/10.1145/1840845.1840847.Full Text
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Niu, D., Y. Chen, and Y. Xie. “Low-power dual-element memristor based memory design.” In Proceedings of the International Symposium on Low Power Electronics and Design, 25–30, 2010. https://doi.org/10.1145/1840845.1840851.Full Text
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Chen, Y., X. Wang, W. Zhu, H. Li, Z. Sun, G. Sun, and Y. Xie. “Access scheme of multi-level cell spin-transfer torque random access memory and its optimization.” In Midwest Symposium on Circuits and Systems, 1109–12, 2010. https://doi.org/10.1109/MWSCAS.2010.5548848.Full Text
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Li, H., and Y. Chen. “Emerging non-volatile memory technologies: From materials, to device, circuit, and architecture.” In Midwest Symposium on Circuits and Systems, 1–4, 2010. https://doi.org/10.1109/MWSCAS.2010.5548590.Full Text
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Chen, Y., X. Wang, Z. Sun, and H. Li. “The application of spintronic devices in magnetic bio-sensing.” In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, Asqed 2010, 230–34, 2010. https://doi.org/10.1109/ASQED.2010.5548244.Full Text
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Niu, D., Y. Chen, C. Xu, and Y. Xie. “Impact of process variations on emerging memristor.” In Proceedings Design Automation Conference, 877–82, 2010. https://doi.org/10.1145/1837274.1837495.Full Text
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Chen, Y., H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang. “A nondestructive self-reference scheme for spin-transfer torque random access memory (STT-RAM).” In Proceedings Design, Automation and Test in Europe, Date, 148–53, 2010.
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Wang, X., and Y. Chen. “Spintronic memristor devices and application.” In Proceedings Design, Automation and Test in Europe, Date, 667–72, 2010.
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Chen, Y., W. Tian, H. Li, X. Wang, and W. Zhu. “Scalability of PCMO-based resistive switch device in DSM technologies.” In Proceedings of the 11th International Symposium on Quality Electronic Design, Isqed 2010, 327–32, 2010. https://doi.org/10.1109/ISQED.2010.5450447.Full Text
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Sun, G., Y. Joo, Y. Chen, D. Niu, Y. Xie, and H. Li. “A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.” In Proceedings International Symposium on High Performance Computer Architecture, 2010. https://doi.org/10.1109/hpca.2010.5416650.Full Text
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Sun, Z., H. Li, Y. Chen, and X. Wang. “Variation tolerant sensing scheme of spin-transfer torque memory for yield improvement.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 432–37, 2010. https://doi.org/10.1109/ICCAD.2010.5653720.Full Text
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Koh, C. K., W. F. Wong, Y. Chen, and H. Li. “The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies.” In Proceedings Ieee International Conference on Computer Design: Vlsi in Computers and Processors, 268–74, 2009. https://doi.org/10.1109/ICCD.2009.5413145.Full Text
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Chen, Y., and X. Wang. “Compact modeling and corner analysis of spintronic memristor.” In 2009 Ieee/Acm International Symposium on Nanoscale Architectures, Nanoarch 2009, 7–12, 2009. https://doi.org/10.1109/NANOARCH.2009.5226363.Full Text
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Li, H., H. Xi, Y. Chen, J. Stricklin, X. Wang, and T. Zhang. “Thermal-assisted spin transfer torque memory (STT-RAM) cell design exploration.” In Proceedings of the 2009 Ieee Computer Society Annual Symposium on Vlsi, Isvlsi 2009, 217–22, 2009. https://doi.org/10.1109/ISVLSI.2009.17.Full Text
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Sun, G., X. Dong, Y. Xie, J. Li, and Y. Chen. “A novel architecture of the 3D stacked MRAM L2 Cache for CMPs.” In Proceedings International Symposium on High Performance Computer Architecture, 239–49, 2009. https://doi.org/10.1109/HPCA.2009.4798259.Full Text
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Xu, W., Y. Chen, X. Wang, and T. Zhang. “Improving STT MRAM storage density through smaller-than-worst-case transistor sizing.” In Proceedings Design Automation Conference, 87–90, 2009. https://doi.org/10.1145/1629911.1629936.Full Text
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Xu, W., T. Zhang, and Y. Chen. “Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin.” In Proceedings Ieee International Symposium on Circuits and Systems, 1898–1901, 2008. https://doi.org/10.1109/ISCAS.2008.4541813.Full Text
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Dong, X., X. Wu, G. Sun, Y. Xie, H. Li, and Y. Chen. “Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement.” In Proceedings Design Automation Conference, 554–59, 2008. https://doi.org/10.1109/DAC.2008.4555878.Full Text
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Chen, Y., X. Wang, H. Li, H. Liu, and D. V. Dimitrov. “Design margin exploration of Spin-Torque Transfer RAM (SPRAM).” In Proceedings of the 9th International Symposium on Quality Electronic Design, Isqed 2008, 684–90, 2008. https://doi.org/10.1109/ISQED.2008.4479820.Full Text
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Chen, Y., H. Li, J. Li, and C. K. Koh. “Variable-latency adder (VL-adder): New arithmetic circuit design practice to overcome NBTI.” In Proceedings of the International Symposium on Low Power Electronics and Design, 195–200, 2007. https://doi.org/10.1145/1283780.1283822.Full Text
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Wong, W. F., C. K. Kon, Y. Chen, and H. Li. “VOSCH: Voltage scaled cache hierarchies.” In 2007 Ieee International Conference on Computer Design, Iccd 2007, 496–503, 2007. https://doi.org/10.1109/ICCD.2007.4601944.Full Text
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Li, H., C. K. Koh, V. Balakrishnan, and Y. Chen. “Statistical timing analysis considering spatial correlations.” In Proceedings Eighth International Symposium on Quality Electronic Design, Isqed 2007, 102–7, 2007. https://doi.org/10.1109/ISQED.2007.149.Full Text
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Li, H., Y. Chen, K. Roy, and C. K. Koh. “SAVS: A self-adaptive variable supply-voltage technique for process- Tolerant and power-efficient multi-issue superscalar processor design.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 2006:158–63, 2006.
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Chen, Y., H. Li, K. Roy, and C. K. Koh. “Cascaded carry-select adder (C2 SA): A new structure for low-power CSA design.” In Proceedings of the International Symposium on Low Power Electronics and Design, 115–18, 2005.
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Kang, D., Y. Chen, and K. Roy. “Power supply noise-aware scheduling and allocation for DSP synthesis.” In Proceedings International Symposium on Quality Electronic Design, Isqed, 48–53, 2005. https://doi.org/10.1109/ISQED.2005.97.Full Text
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Chen, Y., H. Li, K. Roy, and C. K. Koh. “Gated Decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies.” In Proceedings of the Custom Integrated Circuits Conference, 2005:775–78, 2005. https://doi.org/10.1109/CICC.2005.1568783.Full Text
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Lam, W. C. D., J. Jain, C. K. Koh, V. Balakrishnan, and Y. Chen. “Statistical based link insertion for robust clock network design.” In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 2005:588–91, 2005. https://doi.org/10.1109/ICCAD.2005.1560134.Full Text
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Chen, Y., K. Roy, and C. K. Koh. “Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocessor.” In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 894–99, 2004.
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Chen, Y., K. Roy, and C. K. Koh. “Integrated architectural/physical planning approach for minimization of current surge in high performance clock-gated microprocessors.” In Proceedings of the International Symposium on Low Power Electronics and Design, 2003-January:229–34, 2003. https://doi.org/10.1109/LPE.2003.1231867.Full Text
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Chen, Y., K. Roy, and C. K. Koh. “Integrated Architectural/Physical Planning Approach for Minimization of Current Surge in High Performance Clock-gated Microprocessors.” In Proceedings of the International Symposium on Low Power Electronics and Design, 229–34, 2003. https://doi.org/10.1145/871506.871563.Full Text
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Li, H., S. Bhunia, Y. Chen, T. N. Vijaykumar, and K. Roy. “Deterministic clock gating for microprocessor power reduction.” In Proceedings International Symposium on High Performance Computer Architecture, 12:113–22, 2003. https://doi.org/10.1109/HPCA.2003.1183529.Full Text
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Chen, Y., V. Balakrishnan, C. K. Koh, and K. Roy. “Model reduction in the time-domain using Laguerre polynomials and Krylov methods.” In Proceedings Design, Automation and Test in Europe, Date, 931–36, 2002. https://doi.org/10.1109/DATE.2002.998411.Full Text
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