Overview
Yiran Chen earned his B.S. in 1998 and M.S. in 2001 from Tsinghua University and completed his Ph.D. in 2005 at Purdue University. In 2010, he joined the University of Pittsburgh as an Assistant Professor, where he was later promoted to Associate Professor with tenure in 2014, holding the prestigious Bicentennial Alumni Faculty Fellowship. He currently serves as the John Cocke Distinguished Professor of Electrical and Computer Engineering at Duke University.
Dr. Chen is the Director of the National Science Foundation (NSF) AI Institute for Edge Computing Leveraging (Athena), one of the 27 National AI Institutes in the United States. He also leads the NSF Industry-University Cooperative Research Center (IUCRC) for Alternative Sustainable and Intelligent Computing (ASIC) and co-directs the Duke Center for Computational Evolutionary Intelligence (DCEI). His research group focuses on innovations in emerging memory and storage systems, machine learning and neuromorphic computing, and edge computing.
Throughout his career, Dr. Chen has supervised or is currently supervising over 60 Ph.D. students and 4 postdoctoral scholars. Many of his mentees have achieved significant success, with 14 joining faculties at institutions in the United States, Turkey, Hong Kong, and China, including four NSF CAREER Awardees.
Dr. Chen has an extensive publication record, including one book, over 700 technical papers, and 96 U.S. patents. His work has earned 15 paper awards, including two Test-of-Time Awards, and 17 best paper nominations from leading international journals and conferences. Among his numerous accolades, he is one of only three individuals to receive Technical Achievement Awards from both the IEEE Circuits and Systems Society and the IEEE Computer Society, organizations with histories spanning 76 and 79 years, respectively.
He has served as a Distinguished Lecturer for the IEEE Council on Electronic Design Automation (CEDA) and the IEEE Circuits and Systems Society (CASS), as well as a Distinguished Visitor of the IEEE Computer Society (CS). He is a Fellow of the AAAS, ACM, IEEE, and NAI, and a member of the European Academy of Sciences and Arts. From 2021 to 2024, he chaired the ACM Special Interest Group on Design Automation (SIGDA), and he was Editor-in-Chief of the IEEE Circuits and Systems Magazine from 2020 to 2023. Currently, he is the inaugural Editor-in-Chief of the IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI) and the inaugural Chair of the IEEE Circuits and Systems Society Machine Learning Circuits and Systems (MLCAS) Technical Committee. He has served as a member of the Committee on Using Machine Learning in Safety-Critical Applications: Setting a Research Agenda, The National Academies of Sciences, Engineering, and Medicine.
Beyond academia, Dr. Chen has contributed to industry as Chairman of the Board, Independent Director, and consultant for several startups and venture capital firms. He is a passionate advocate for the responsible use of AI technologies. Dr. Chen is a founding member of the steering committee for the Academic Alliance on AI Policy (AAAIP) and a Fellow of the Asian American Scholar Forum (AASF).
Current Appointments & Affiliations
Recent Publications
MulPi: A Multi-class and Patient-Independent Epileptic Seizure Classifier With Co-Designed Input-stationary Computing-in-SRAM.
Journal Article IEEE transactions on biomedical circuits and systems · August 2025 Unprovoked seizures have threatened epilepsy patients over 70 million. Automated classification to detect and predict seizures could bring seizure-free lives to epilepsy patients, delivering them from fatal danger and increasing the quality of life. Authen ... Full text CiteAutoRAC: Automated Processing-in-Memory Accelerator Design for Recommender Systems
Conference Proceedings of the ACM Great Lakes Symposium on VLSI Glsvlsi · June 29, 2025 The performance bottleneck of deep-learning-based recommender systems resides in their backbone Deep Neural Networks. By integrating Processing-In-Memory (PIM) architectures, researchers can reduce data movement and enhance energy efficiency, paving the wa ... Full text CiteFP-SMR: A Fully Digital Floating-Point Processing-in-SAS-MRAM for Session-based Recommender System
Conference Proceedings of the ACM Great Lakes Symposium on VLSI Glsvlsi · June 29, 2025 With the rapid advancement of DNNs, numerous Process-in-Memory (PIM) architectures based on various memory technologies (Non-Volatile (NVM)/Volatile Memory) have been developed to accelerate AI workloads. Magnetic Random Access Memory (MRAM) is highly prom ... Full text CiteRecent Grants
Neuromorphic Computing Circuit Primitive Testbeds
ResearchPrincipal Investigator · Awarded by Department of Energy · 2025 - 2030DoD Center of Excellence in Advanced Computing and Software (COE-ACS)
ResearchPrincipal Investigator · Awarded by Georgia State University · 2023 - 2028GenC - Bio-Inspired Generalized Neuronal Circuits with Dendritic Plasticity and Adaptive Firing Thresholds through Hybrid CMOS-Emerging Devices Implementation
ResearchPrincipal Investigator · Awarded by Department of Energy · 2025 - 2027View All Grants