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Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data

Publication ,  Journal Article
Wang, F; Cachecho, P; Zhang, W; Sun, S; Li, X; Kanj, R; Gu, C
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
August 1, 2016

Efficient performance modeling of today's analog and mixed-signal circuits is an important yet challenging task, due to the high-dimensional variation space and expensive circuit simulation. In this paper, we propose a novel performance modeling algorithm that is referred to as Bayesian model fusion (BMF) to address this challenge. The key idea of BMF is to borrow the information collected from an early stage (e.g., schematic level) to facilitate efficient performance modeling at a late stage (e.g., post layout). Such a goal is achieved by statistically modeling the performance correlation between early and late stages through Bayesian inference. Furthermore, to make the proposed BMF method of practical utility, four implementation issues, including: 1) prior mapping; 2) missing prior knowledge; 3) fast solver; and 4) prior and hyper-parameter selection, are carefully considered in this paper. Two circuit examples designed in a commercial 32 nm CMOS silicon on insulator process demonstrate that the proposed BMF method achieves up to $9\times $ runtime speed-up over the traditional modeling technique without surrendering any accuracy.

Duke Scholars

Published In

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

ISSN

0278-0070

Publication Date

August 1, 2016

Volume

35

Issue

8

Start / End Page

1255 / 1268

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering
 

Citation

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Wang, F., Cachecho, P., Zhang, W., Sun, S., Li, X., Kanj, R., & Gu, C. (2016). Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35(8), 1255–1268. https://doi.org/10.1109/TCAD.2015.2504329
Wang, F., P. Cachecho, W. Zhang, S. Sun, X. Li, R. Kanj, and C. Gu. “Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35, no. 8 (August 1, 2016): 1255–68. https://doi.org/10.1109/TCAD.2015.2504329.
Wang F, Cachecho P, Zhang W, Sun S, Li X, Kanj R, et al. Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2016 Aug 1;35(8):1255–68.
Wang, F., et al. “Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 8, Aug. 2016, pp. 1255–68. Scopus, doi:10.1109/TCAD.2015.2504329.
Wang F, Cachecho P, Zhang W, Sun S, Li X, Kanj R, Gu C. Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2016 Aug 1;35(8):1255–1268.

Published In

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

ISSN

0278-0070

Publication Date

August 1, 2016

Volume

35

Issue

8

Start / End Page

1255 / 1268

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering