Skip to main content

Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree

Publication ,  Journal Article
Liao, C; Tao, J; Zeng, X; Su, Y; Zhou, D; Li, X
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
June 1, 2016

In this paper, we propose a novel spatial variation modeling method based on hidden Markov tree (HMT) for nanoscale integrated circuits, which could efficiently improve the accuracy of full-wafer/chip spatial variations recovery at extremely low measurement cost. Applying this method, HMT is introduced to set up a statistical model for coefficients after exploring the underlying correlated representation of the spatial variation in the frequency domain. Accordingly, two key inherent properties of the modeling coefficients, i.e., correlations and sparse presentations in the frequency domain, can be captured exactly and the modeling accuracy can be improved evidently. Then, maximum-a-posteriori estimation is applied to formulate the original problem as a convex optimization that could be solved efficiently and robustly. Numerical results based on industrial data demonstrate that the proposed method can achieve superior accuracy over other existing approaches including orthogonal matching pursuit, l1 -norm regularization, and reweighted l1 -norm regularization.

Duke Scholars

Published In

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

ISSN

0278-0070

Publication Date

June 1, 2016

Volume

35

Issue

6

Start / End Page

971 / 984

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering
 

Citation

APA
Chicago
ICMJE
MLA
NLM
Liao, C., Tao, J., Zeng, X., Su, Y., Zhou, D., & Li, X. (2016). Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35(6), 971–984. https://doi.org/10.1109/TCAD.2015.2481868
Liao, C., J. Tao, X. Zeng, Y. Su, D. Zhou, and X. Li. “Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35, no. 6 (June 1, 2016): 971–84. https://doi.org/10.1109/TCAD.2015.2481868.
Liao C, Tao J, Zeng X, Su Y, Zhou D, Li X. Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2016 Jun 1;35(6):971–84.
Liao, C., et al. “Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 6, June 2016, pp. 971–84. Scopus, doi:10.1109/TCAD.2015.2481868.
Liao C, Tao J, Zeng X, Su Y, Zhou D, Li X. Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2016 Jun 1;35(6):971–984.

Published In

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

ISSN

0278-0070

Publication Date

June 1, 2016

Volume

35

Issue

6

Start / End Page

971 / 984

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering