Jenga: Efficient fault tolerance for stacked DRAM
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Mappouras, G; Vahid, A; Calderbank, R; Hower, DR; Sorin, DJ
Published in: Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
November 22, 2017
In this paper, we introduce Jenga, a new scheme for protecting 3D DRAM, specifically high bandwidth memory (HBM), from failures in bits, rows, banks, channels, dies, and TSVs. By providing redundancy at the granularity of a cache block rather than across blocks, as in the current state of the art Jenga achieves greater error-free performance and lower error recovery latency. We show that Jenga's runtime is on average only 1.03 the runtime of our Baseline across a range of benchmarks. Additionally, for memory intensive benchmarks, Jenga is on average 1.11 faster than prior work.
Duke Scholars
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Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
DOI
Publication Date
November 22, 2017
Start / End Page
361 / 368
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Mappouras, G., Vahid, A., Calderbank, R., Hower, D. R., & Sorin, D. J. (2017). Jenga: Efficient fault tolerance for stacked DRAM. In Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017 (pp. 361–368). https://doi.org/10.1109/ICCD.2017.62
Mappouras, G., A. Vahid, R. Calderbank, D. R. Hower, and D. J. Sorin. “Jenga: Efficient fault tolerance for stacked DRAM.” In Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017, 361–68, 2017. https://doi.org/10.1109/ICCD.2017.62.
Mappouras G, Vahid A, Calderbank R, Hower DR, Sorin DJ. Jenga: Efficient fault tolerance for stacked DRAM. In: Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017. 2017. p. 361–8.
Mappouras, G., et al. “Jenga: Efficient fault tolerance for stacked DRAM.” Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017, 2017, pp. 361–68. Scopus, doi:10.1109/ICCD.2017.62.
Mappouras G, Vahid A, Calderbank R, Hower DR, Sorin DJ. Jenga: Efficient fault tolerance for stacked DRAM. Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017. 2017. p. 361–368.
Published In
Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
DOI
Publication Date
November 22, 2017
Start / End Page
361 / 368