Overview
Dr. Daniel Sorin is a professor of Electrical and Computer Engineering at Duke University. His research interests are primarily in computer architecture and dependability.
Current Appointments & Affiliations
Professor of Electrical and Computer Engineering
·
2015 - Present
Electrical and Computer Engineering,
Pratt School of Engineering
Bass Fellow
·
2019 - Present
Electrical and Computer Engineering,
Pratt School of Engineering
Associate Chair of Education in the Department of Electrical and Computer Engineering
·
2024 - Present
Electrical and Computer Engineering,
Pratt School of Engineering
Professor in Computer Science
·
2019 - Present
Computer Science,
Trinity College of Arts & Sciences
Recent Publications
Determining the Minimum Number of Virtual Networks for Different Coherence Protocols
Conference Proceedings - International Symposium on Computer Architecture · January 1, 2024 We revisit the question of how many virtual networks (VNs) are required to provably avoid deadlock in a cache coherence protocol. The textbook way of reasoning about VNs says that the number of VNs depends on the longest chain of message dependencies in th ... Full text CitePipeGen: Automated Transformation of a Single-Core Pipeline Into a Multicore Pipeline for a Given Memory Consistency Model
Conference Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT · January 1, 2024 Designing a pipeline for a multicore processor is difficult. One major challenge is designing it such that the pipeline correctly enforces the intended memory consistency model (MCM). We have developed the PipeGen design automation tool to allow architects ... Full text CiteRigorous Evaluation of Computer Processors with Statistical Model Checking
Conference Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023 · October 28, 2023 Experiments with computer processors must account for the inherent variability in executions. Prior work has shown that real systems exhibit variability, and random effects must be injected into simulators to account for it. Thus, we can run multiple execu ... Full text CiteRecent Grants
SHF: Small: Transforming Computer Architecture Evaluation with Statistical Model Checking
ResearchPrincipal Investigator · Awarded by National Science Foundation · 2021 - 2025SHF:Small:Automatic Generation of Cache Coherent Memory Systems for Multicore Processors
ResearchPrincipal Investigator · Awarded by National Science Foundation · 2020 - 2024CIF:Small:High Performance Memories that Integrate Coding and Computer Architecture
ResearchCo Investigator · Awarded by National Science Foundation · 2017 - 2020View All Grants
Education, Training & Certifications
University of Wisconsin, Madison ·
2002
Ph.D.
University of Wisconsin, Madison ·
1998
M.S.
Duke University ·
1996
B.S.