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Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses

Publication ,  Journal Article
Zhu, J; Sun, G; Zhang, X; Zhang, C; Zhang, W; Liang, Y; Wang, T; Chen, Y; Di, J
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
October 1, 2020

Outsourcing data to a third-party cloud provider has become quite common with the increasing use of cloud computing. This brings convenience, as well as the concern for data security and privacy. It is believed that data encryption alone is often not enough to protect users' privacy from the cloud provider. According to previous work, the sequence of storage locations accessed by the client can leak up to 90% of the sensitive information, even with data encrypted. In this context, Oblivious RAM (ORAM) is proposed. ORAM algorithms allow the client to hide its access pattern from the service provider while introducing a lot of extra operations. Among all the prototypes, Path ORAM is one of the most promising designs. However, there are still redundant memory accesses that can be removed without harming the security of traditional ORAM as we observed. We came up with three optimization techniques, including path merging, ORAM request scheduling, and merging aware caching. We also propose a prefetching technique to further decreasing the access overhead. Moreover, we also illustrate the compatibility of Fork Path and some state-of-the-art Path ORAM optimizations. Compared to traditional Path ORAM approaches, our Fork Path ORAM can reduce overall performance overhead and power consumption of memory system by 65% and 44%, while the design overhead is trivial.

Duke Scholars

Published In

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

EISSN

1937-4151

ISSN

0278-0070

Publication Date

October 1, 2020

Volume

39

Issue

10

Start / End Page

2279 / 2292

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering
 

Citation

APA
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ICMJE
MLA
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Zhu, J., Sun, G., Zhang, X., Zhang, C., Zhang, W., Liang, Y., … Di, J. (2020). Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(10), 2279–2292. https://doi.org/10.1109/TCAD.2019.2948914
Zhu, J., G. Sun, X. Zhang, C. Zhang, W. Zhang, Y. Liang, T. Wang, Y. Chen, and J. Di. “Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39, no. 10 (October 1, 2020): 2279–92. https://doi.org/10.1109/TCAD.2019.2948914.
Zhu J, Sun G, Zhang X, Zhang C, Zhang W, Liang Y, et al. Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2020 Oct 1;39(10):2279–92.
Zhu, J., et al. “Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 10, Oct. 2020, pp. 2279–92. Scopus, doi:10.1109/TCAD.2019.2948914.
Zhu J, Sun G, Zhang X, Zhang C, Zhang W, Liang Y, Wang T, Chen Y, Di J. Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2020 Oct 1;39(10):2279–2292.

Published In

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

EISSN

1937-4151

ISSN

0278-0070

Publication Date

October 1, 2020

Volume

39

Issue

10

Start / End Page

2279 / 2292

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering