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Black-Box Test-Cost Reduction Based on Bayesian Network Models

Publication ,  Journal Article
Pan, R; Zhang, Z; Li, X; Chakrabarty, K; Gu, X
Published in: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
February 1, 2021

The growing complexity of circuit boards makes manufacturing test increasingly expensive. In order to reduce test cost, a number of test selection methods have been proposed in the literature. However, only few of these methods can be applied to black-box test-cost reduction. In this article, we propose a novel black-box test selection method based on Bayesian networks (BNs), which extract the strong relationship among tests. First, the problem of reducing the black-box test cost is formulated as a constrained optimization problem. Next, multiple structure learning and transfer learning algorithms are implemented to construct BN models. Based on these BN models, we propose an iterative test selection method with a new metric, Bayesian index, for test-cost reduction. In addition, averaging strategies are applied to enhance the reduction performance. Finally, a robust model selection framework is proposed to select the optimal BN model for test-cost reduction. Two case studies with production test data demonstrate that when no prior information is provided, our proposed approach effectively reduces the test cost by up to 14.7%, compared to the state-of-the-art greedy algorithm. Moreover, our proposed approach further reduces the test cost by up to 7.1% when prior information is provided from similar products.

Duke Scholars

Published In

IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems

DOI

EISSN

1937-4151

ISSN

0278-0070

Publication Date

February 1, 2021

Volume

40

Issue

2

Start / End Page

386 / 399

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering
 

Citation

APA
Chicago
ICMJE
MLA
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Pan, R., Zhang, Z., Li, X., Chakrabarty, K., & Gu, X. (2021). Black-Box Test-Cost Reduction Based on Bayesian Network Models. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 40(2), 386–399. https://doi.org/10.1109/TCAD.2020.2994257
Pan, R., Z. Zhang, X. Li, K. Chakrabarty, and X. Gu. “Black-Box Test-Cost Reduction Based on Bayesian Network Models.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 40, no. 2 (February 1, 2021): 386–99. https://doi.org/10.1109/TCAD.2020.2994257.
Pan R, Zhang Z, Li X, Chakrabarty K, Gu X. Black-Box Test-Cost Reduction Based on Bayesian Network Models. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems. 2021 Feb 1;40(2):386–99.
Pan, R., et al. “Black-Box Test-Cost Reduction Based on Bayesian Network Models.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 40, no. 2, Feb. 2021, pp. 386–99. Scopus, doi:10.1109/TCAD.2020.2994257.
Pan R, Zhang Z, Li X, Chakrabarty K, Gu X. Black-Box Test-Cost Reduction Based on Bayesian Network Models. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems. 2021 Feb 1;40(2):386–399.

Published In

IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems

DOI

EISSN

1937-4151

ISSN

0278-0070

Publication Date

February 1, 2021

Volume

40

Issue

2

Start / End Page

386 / 399

Related Subject Headings

  • Computer Hardware & Architecture
  • 4607 Graphics, augmented reality and games
  • 4009 Electronics, sensors and digital hardware
  • 1006 Computer Hardware
  • 0906 Electrical and Electronic Engineering