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A mechanism for online diagnosis of hard faults in microprocessors

Publication ,  Journal Article
Bower, FA; Sorin, DJ; Ozev, S
Published in: Proceedings of the Annual International Symposium on Microarchitecture, MICRO
December 1, 2005

We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-field faults, by leveraging existing microprocessor redundancy. To do this, we must: detect and correct errors, diagnose hard faults at the field deconfigurable unit (FDU) granularity, and deconfigure FDUs with hard faults, In our reliable microprocessor design, we use DIVA dynamic verification to detect and correct errors. Our new scheme for diagnosing hard faults tracks instructions' core structure occupancy from decode until commit. If a DIVA checker detects an error in an instruction, it increments a small saturating error counter for every FDU used by that instruction, including that DIVA checker. A hard fault in an FDU quickly leads to an above-threshold error counter for that FDU and thus diagnoses the fault. For deconfiguration, we use previously developed schemes for functional units and buffers, and we present a scheme for deconfiguring DIVA checkers. Experimental results show that our reliable microprocessor quickly and accurately diagnoses each hard fault that is injected and continues to function, albeit with somewhat degraded performance. © 2005 IEEE.

Duke Scholars

Published In

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

DOI

ISSN

1072-4451

Publication Date

December 1, 2005

Start / End Page

197 / 208
 

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Bower, F. A., Sorin, D. J., & Ozev, S. (2005). A mechanism for online diagnosis of hard faults in microprocessors. Proceedings of the Annual International Symposium on Microarchitecture, MICRO, 197–208. https://doi.org/10.1109/MICRO.2005.8
Bower, F. A., D. J. Sorin, and S. Ozev. “A mechanism for online diagnosis of hard faults in microprocessors.” Proceedings of the Annual International Symposium on Microarchitecture, MICRO, December 1, 2005, 197–208. https://doi.org/10.1109/MICRO.2005.8.
Bower FA, Sorin DJ, Ozev S. A mechanism for online diagnosis of hard faults in microprocessors. Proceedings of the Annual International Symposium on Microarchitecture, MICRO. 2005 Dec 1;197–208.
Bower, F. A., et al. “A mechanism for online diagnosis of hard faults in microprocessors.” Proceedings of the Annual International Symposium on Microarchitecture, MICRO, Dec. 2005, pp. 197–208. Scopus, doi:10.1109/MICRO.2005.8.
Bower FA, Sorin DJ, Ozev S. A mechanism for online diagnosis of hard faults in microprocessors. Proceedings of the Annual International Symposium on Microarchitecture, MICRO. 2005 Dec 1;197–208.

Published In

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

DOI

ISSN

1072-4451

Publication Date

December 1, 2005

Start / End Page

197 / 208