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BYOE: Microelectronic non-idealities laboratory explorations

Publication ,  Conference
Coonley, KD; Culbert, AG; Franklin, A
Published in: ASEE Annual Conference and Exposition, Conference Proceedings
June 22, 2020

Microelectronic circuits and semiconductor devices are presented to students and treated in circuits as ideal. This makes sense initially. Unfortunately, it is often not possible to delve fully into the many non-ideal behaviors these devices can exhibit in practical situations. In practice, thermal effects, gain and load limits, input and output resistance, operating bandwidth constraints, and breakdown limits are non-negligible and important to understand for upper level circuit and semiconductor classes, and senior designs or capstones. This paper presents several laboratory experiments, called explorations, developed for a sophomore-level introductory microelectronic devices and circuits course which introduce microelectronic device non-idealities in a hands-on, self-discovery based laboratory setting. Group learning and presentation skills are employed to provide a breadth of exposure to all the non-ideal behaviors explored. The laboratory experiments presented are designed to be stand-alone and easily explored with only the most basic level of familiarity with wiring and device testing in the laboratory. The non-idealities explorations are described below. Selected activities will be presented at the ASEE conference. Student feedback in the form of a satisfaction survey administered at the end of the semester provides initial data on the success of the non-idealities explorations developed. Thermal Effects on PN Junction Diodes and MOSFETs: This experiment demonstrates the effects of an increased temperature on PN junction diodes and MOSFETs. Students build a simple circuit and measure the current through the integrated circuit at room temperature and at an increased temperature over a fixed voltage range. MOSFET Amplifier Gain and Load Limits: In this experiment, students build a single MOSFET Common-Drain amplifier and verify its AC gain. Loads, both resistive and capacitive are then attached to the circuit and the effects on gain and bandwidth explored. MOSFET Input and Output Resistance: This experiment challenges students to measure and simulate the input and output resistance of a single MOSFET inverter, or buffer circuit. The influences of source and load resistance and supply voltage are suggested explorations. MOSFET Inverter Maximum Clock Frequency with External Capacitance Load: The purpose of this experiment is to determine the effect of output (load) capacitance on a MOSFET inverter circuit. This is done by measuring the maximum achievable device clock frequency with various capacitive loads. Zener Diode and Reverse Breakdown Effects: The purpose of this experiment is to showcase diode reverse breakdown in a practical circuit. To do so, the Zener diode is introduced to demonstrate voltage clamping. A Zener diode circuit is simulated, explored in practice, and its I-V curve measured in the laboratory.

Duke Scholars

Published In

ASEE Annual Conference and Exposition, Conference Proceedings

EISSN

2153-5965

Publication Date

June 22, 2020

Volume

2020-June
 

Citation

APA
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ICMJE
MLA
NLM
Coonley, K. D., Culbert, A. G., & Franklin, A. (2020). BYOE: Microelectronic non-idealities laboratory explorations. In ASEE Annual Conference and Exposition, Conference Proceedings (Vol. 2020-June).
Coonley, K. D., A. G. Culbert, and A. Franklin. “BYOE: Microelectronic non-idealities laboratory explorations.” In ASEE Annual Conference and Exposition, Conference Proceedings, Vol. 2020-June, 2020.
Coonley KD, Culbert AG, Franklin A. BYOE: Microelectronic non-idealities laboratory explorations. In: ASEE Annual Conference and Exposition, Conference Proceedings. 2020.
Coonley, K. D., et al. “BYOE: Microelectronic non-idealities laboratory explorations.” ASEE Annual Conference and Exposition, Conference Proceedings, vol. 2020-June, 2020.
Coonley KD, Culbert AG, Franklin A. BYOE: Microelectronic non-idealities laboratory explorations. ASEE Annual Conference and Exposition, Conference Proceedings. 2020.

Published In

ASEE Annual Conference and Exposition, Conference Proceedings

EISSN

2153-5965

Publication Date

June 22, 2020

Volume

2020-June