A Zero Common Mode Voltage PWM Scheme With Minimum Zero-Sequence Circulating Current for Two-Parallel Three-Phase Two-Level Converters
This article introduces a pulse width modulation (PWM) scheme for both common mode voltage elimination and zero-sequence circulating current suppression. Our approach began with analyzing the relationship among basic vectors, common mode voltage elimination, and zero-sequence circulating current suppression to select optimal vectors that support both objectives. Following this, we arranged these selected vectors strategically to achieve simultaneous common mode voltage elimination and zero-sequence circulating current suppression, resulting in six optimal vector sequences for each 60° sector. Considering the redundancy of the proposed vector sequences, each 60° sector is subdivided into four subsectors for optimal performance, each employing its optimal vector sequences. In addition, we implemented a carrier-based modulation scheme to simplify the implementation of the proposed vector sequences. The vertical and horizontal comparisons with the existing common mode voltage elimination method and other representative zero-sequence circulating current suppression modulation schemes reveal that our method attains both common mode voltage elimination and zero-sequence circulating current suppression, outperforming existing methods. Experimental results further confirm the effectiveness of our proposed approach.
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- 4009 Electronics, sensors and digital hardware
- 4008 Electrical engineering
- 0906 Electrical and Electronic Engineering
Citation
Published In
DOI
EISSN
ISSN
Publication Date
Volume
Issue
Start / End Page
Related Subject Headings
- 4009 Electronics, sensors and digital hardware
- 4008 Electrical engineering
- 0906 Electrical and Electronic Engineering