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Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver

Publication ,  Journal Article
Jung, S; Brooke, MA; Jokerst, NM; Liu, J; Joo, Y
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs
2004
Published version (DOI) Link to item

A differential laser driver (LD) operating at 1 Gb/s been designed and tested using NSC 0.35-μm CMOS technology. The effect of simultaneous switching noise caused by packaging parasitic was addressed and the parasitic model was developed to predict the exact behavior of circuit performance. With the developed parasitic model, the LD simulation results showed the degradation of the output signal. Thus, the effectiveness of the decoupling capacitor was suggested and investigated through the LD design. However, the test results did not match with the expected results due to the parasitic in the input and output nodes. Hence, the back-annotated analysis was performed with the developed parasitic models and the simulated output of the LD matched with that of the tested results. © 2004 IEEE.

Duke Scholars

Martin A. Brooke
Author Martin A. Brooke Electrical and Computer Engineering
Nan Marie Jokerst
Author Nan Marie Jokerst Electrical and Computer Engineering

Published In

IEEE Transactions on Circuits and Systems II: Express Briefs

DOI

10.1109/TCSII.2004.834540

Publication Date

2004

Volume

51

Issue

10

Start / End Page

517 / 522

Related Subject Headings

  • Electrical & Electronic Engineering
  • 4009 Electronics, sensors and digital hardware
  • 4006 Communications engineering
  • 0906 Electrical and Electronic Engineering
 

Citation

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Jung, S., Brooke, M. A., Jokerst, N. M., Liu, J., & Joo, Y. (2004). Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver. IEEE Transactions on Circuits and Systems II: Express Briefs, 51(10), 517–522. https://doi.org/10.1109/TCSII.2004.834540
Jung, Sungyong, Martin A. Brooke, Nan Marie Jokerst, Jin Liu, and Youngjoong Joo. “Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver.” IEEE Transactions on Circuits and Systems II: Express Briefs 51, no. 10 (2004): 517–22. https://doi.org/10.1109/TCSII.2004.834540.
Jung S, Brooke MA, Jokerst NM, Liu J, Joo Y. Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver. IEEE Transactions on Circuits and Systems II: Express Briefs. 2004;51(10):517–22.
Jung, Sungyong, et al. “Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver.” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 51, no. 10, 2004, pp. 517–22. Manual, doi:10.1109/TCSII.2004.834540.
Jung S, Brooke MA, Jokerst NM, Liu J, Joo Y. Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver. IEEE Transactions on Circuits and Systems II: Express Briefs. 2004;51(10):517–522.

Published In

IEEE Transactions on Circuits and Systems II: Express Briefs

DOI

10.1109/TCSII.2004.834540

Publication Date

2004

Volume

51

Issue

10

Start / End Page

517 / 522

Related Subject Headings

  • Electrical & Electronic Engineering
  • 4009 Electronics, sensors and digital hardware
  • 4006 Communications engineering
  • 0906 Electrical and Electronic Engineering