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Passive device modeling methodology using nonlinear optimization

Publication ,  Journal Article
Carastro, LA; Poddar, R; Moon, E; Brooke, MA; Jokerst, NM
Published in: Proceedings IEEE International Symposium on Circuits and Systems
January 1, 1999

In this paper we describe a method of accurately modeling new passive devices by deembedding the many building blocks from which they are built from just a few test structures. We use a nonlinear optimizer to find the optimal models for the building blocks by fitting extensive high frequency measurements of the test structures behavior. Key results are: the number of test structures needed is much less than the number of parameters and building blocks to be extracted; the extracted models of the building blocks are very predictive of the behavior of new devices built from them; and this methodology is much faster than other finite element like methods.

Duke Scholars

Published In

Proceedings IEEE International Symposium on Circuits and Systems

ISSN

0271-4310

Publication Date

January 1, 1999

Volume

6

Start / End Page

I-53-I-56
 

Citation

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Carastro, L. A., Poddar, R., Moon, E., Brooke, M. A., & Jokerst, N. M. (1999). Passive device modeling methodology using nonlinear optimization. Proceedings IEEE International Symposium on Circuits and Systems, 6, I-53-I–56.
Carastro, L. A., R. Poddar, E. Moon, M. A. Brooke, and N. M. Jokerst. “Passive device modeling methodology using nonlinear optimization.” Proceedings IEEE International Symposium on Circuits and Systems 6 (January 1, 1999): I-53-I–56.
Carastro LA, Poddar R, Moon E, Brooke MA, Jokerst NM. Passive device modeling methodology using nonlinear optimization. Proceedings IEEE International Symposium on Circuits and Systems. 1999 Jan 1;6:I-53-I–56.
Carastro, L. A., et al. “Passive device modeling methodology using nonlinear optimization.” Proceedings IEEE International Symposium on Circuits and Systems, vol. 6, Jan. 1999, pp. I-53-I–56.
Carastro LA, Poddar R, Moon E, Brooke MA, Jokerst NM. Passive device modeling methodology using nonlinear optimization. Proceedings IEEE International Symposium on Circuits and Systems. 1999 Jan 1;6:I-53-I–56.

Published In

Proceedings IEEE International Symposium on Circuits and Systems

ISSN

0271-4310

Publication Date

January 1, 1999

Volume

6

Start / End Page

I-53-I-56