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Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper)

Publication ,  Conference
Li, H; Liu, X; Mao, M; Chen, Y; Wu, Q; Barnell, M
Published in: Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014
February 2, 2015

The explosion of big data applications imposes severe challenges of data processing speed and scalability on traditional computer systems. However, the performance of the von Neumann machine is greatly hindered by the increasing performance gap between CPU and memory, motivating the active research on new or alternative computing architectures. As one important instance, neuromorphic computing systems inspired by the working mechanism of human brains have gained considerable attention. In this work, we propose a heterogeneous computing system with neuromorphic computing accelerators (NCAs) that are built with emerging memristor technology. In the proposed system, NCA is designed to speed up the artificial neural network (ANN) executions in many high-performance applications by leveraging the extremely efficient mixed-signal computation capability of nanoscale memristor-based crossbar (MBC) arrays. The hierarchical MBC arrays of the NCA can be flexibly configured to different ANN topologies through the help of an analog Network-on-Chip (A-NoC). A general approach which translates the target codes within a program to the corresponding NCA instructions is also developed to facilitate the utilization of the NCA. Our simulation results show that compared to the baseline general purpose processor, the proposed heterogeneous system can achieve on average 18.2x performance speedup and 20.1x energy reduction over nine representative applications while constraining the computation accuracy degradation within an acceptable range.

Duke Scholars

Published In

Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014

DOI

Publication Date

February 2, 2015

Start / End Page

124 / 127
 

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Li, H., Liu, X., Mao, M., Chen, Y., Wu, Q., & Barnell, M. (2015). Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper). In Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014 (pp. 124–127). https://doi.org/10.1109/ISICIR.2014.7029530
Li, H., X. Liu, M. Mao, Y. Chen, Q. Wu, and M. Barnell. “Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper).” In Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 124–27, 2015. https://doi.org/10.1109/ISICIR.2014.7029530.
Li H, Liu X, Mao M, Chen Y, Wu Q, Barnell M. Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper). In: Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014. 2015. p. 124–7.
Li, H., et al. “Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper).” Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 2015, pp. 124–27. Scopus, doi:10.1109/ISICIR.2014.7029530.
Li H, Liu X, Mao M, Chen Y, Wu Q, Barnell M. Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper). Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014. 2015. p. 124–127.

Published In

Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014

DOI

Publication Date

February 2, 2015

Start / End Page

124 / 127