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Spintronic memristor: Compact model and statistical analysis

Publication ,  Journal Article
Hu, M; Li, HH; Chen, Y; Wang, X
Published in: Journal of Low Power Electronics
January 1, 2011

The fourth fundamental passive circuit element - memristor, has received the increased attentions after a real device was demonstrated by HP Lab in 2008. The distinctive characteristic of a memristor to record the historical profile of the voltage/current through itself creates great potentials in highly integrated circuit and system design. Among all the proposed memristor structures, magnetic-based spintronic memristor becomes a promising technology for its simple structure and the compatibility to the traditional CMOS process. In this paper, we depict a compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism. Our model takes into account the variations of material parameters and fabrication process, which significantly affect the actual electrical characteristics of a memristor in nano-scale technologies. Furthermore, we present the applications of the compact model, analyze the effect of process variations on memristor electrical properties, and discuss the corresponding circuit design considerations. Our proposed compact model can be easily implemented in Verilog-A language, compatible to SPICE-based simulation, and beneficial to minimize the design margin of memristor-based circuit implementations. Copyright © 2011 American Scientific Publishers All rights reserved.

Duke Scholars

Published In

Journal of Low Power Electronics

DOI

EISSN

1546-2005

ISSN

1546-1998

Publication Date

January 1, 2011

Volume

7

Issue

2

Start / End Page

234 / 244
 

Citation

APA
Chicago
ICMJE
MLA
NLM
Hu, M., Li, H. H., Chen, Y., & Wang, X. (2011). Spintronic memristor: Compact model and statistical analysis. Journal of Low Power Electronics, 7(2), 234–244. https://doi.org/10.1166/jolpe.2011.1131
Hu, M., H. H. Li, Y. Chen, and X. Wang. “Spintronic memristor: Compact model and statistical analysis.” Journal of Low Power Electronics 7, no. 2 (January 1, 2011): 234–44. https://doi.org/10.1166/jolpe.2011.1131.
Hu M, Li HH, Chen Y, Wang X. Spintronic memristor: Compact model and statistical analysis. Journal of Low Power Electronics. 2011 Jan 1;7(2):234–44.
Hu, M., et al. “Spintronic memristor: Compact model and statistical analysis.” Journal of Low Power Electronics, vol. 7, no. 2, Jan. 2011, pp. 234–44. Scopus, doi:10.1166/jolpe.2011.1131.
Hu M, Li HH, Chen Y, Wang X. Spintronic memristor: Compact model and statistical analysis. Journal of Low Power Electronics. 2011 Jan 1;7(2):234–244.

Published In

Journal of Low Power Electronics

DOI

EISSN

1546-2005

ISSN

1546-1998

Publication Date

January 1, 2011

Volume

7

Issue

2

Start / End Page

234 / 244